0. ECE Dept, K.N. Toosi University of Technology
Nyquist Rate ADCs
Dr. Hossein Shamsi
ECE Dept, K.N. Toosi University of Technology

1. Content Sample & Hold Circuits Voltage Comparators Dual-Slope ADC
Flash ADC
SAR ADC
Cyclic ADC
Two-Step ADC
Pipelined ADC
Time Interleaved ADC
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2. Ideal Voltage Comparator
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3. Preview - Flash ADC
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4. Design Considerations
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5. Gain Requirements
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6. How to Implement High Gain?
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7. How about Using an OpAmp or OTA?
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8. Cascade of Open-Loop Amplifiers
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9. Step Response (1)
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10. Step Response (2)
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11. Delay versus Number of Stages
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12. Optimum Number of Stages
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13. Optimum Gain per Stage
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14. Cascade of "Integrators" (1)
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15. Cascade of "Integrators" (2)
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16. Latched Comparator (1)
Analysis:
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17. Latched Comparator (2) ;
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18. Comparison
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19. Latch "Gain”
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20. Architecture
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21. Metastability (1)
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22. Metastability (2)
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23. Metastability (3)
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24. CMOS comparators
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25. Input Referred Offset
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26. Amplifier Offset Cancellation (1)
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27. Amplifier Offset Cancellation (2)
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28. Output Series Cancellation
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29. Input Series Cancellation
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30. Overdrive Recovery (1)
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31. Overdrive Recovery (2)
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32. Overdrive Recovery (3)
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33. Comparator Examples (1)
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34. Comparator Examples (2)
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35. Comparator Examples (3)
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