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Lecture 18 PicoBlaze Instruction Set & Assembler Directives
ECE 448 – FPGA and ASIC Design with VHDL
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Required reading Recommended reading
P. Chu, FPGA Prototyping by VHDL Examples Chapter 15 PicoBlaze Assembly Code Development Recommended reading K. Chapman, PicoBlaze for Spartan-6, Virtex-6, 7-Series, Zynq and UltraScale Devices (KCPSM6)) ECE 448 – FPGA and ASIC Design with VHDL
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PicoBlaze-6 Programming Model
Bank B Bank A FFC FFD FFE FFF ECE 448 – FPGA and ASIC Design with VHDL
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Syntax and Terminology
Syntax Example Definition sX KK PORT(KK) PORT((sX)) RAM(KK) s7 0xAB PORT(2) PORT((sa)) RAM(4) Value at register 7 Constant AB (in hex) Input value from port 2 Input value from the port specified by register a Value from RAM location 4
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Addressing modes Immediate mode SUB s7, 0x07 s7 <= s7 – 0x07
s2 <= s2 + 0x08 + C Immediate mode SUB s7, 0x07 ADDC s2, 0x08 Direct mode ADD sa, sf IN s5, 0x2a sa <= sa + sf s5 <= PORT(0x2a) Indirect mode STORE s3, sa IN s9, s2 RAM((sa)) <= s3 s9 <= PORT((s2))
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PicoBlaze Development Environments
Xilinx KCPSM3/6 FIDEx IDE Platform support Windows Assembler Command-line in DOS window Graphical Instruction Syntax KCPSM3/6 Instruction Set Simulator Facilities provided for VHDL simulation Graphical/ Interactive Simulator Breakpoints N/A Yes Register Viewer Memory Viewer
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ECE 448 – FPGA and ASIC Design with VHDL
KCPSM6 Assembler Files KCPSM6.EXE ECE 448 – FPGA and ASIC Design with VHDL
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Differences between Mnemonics of Instructions
KCPSM3/ 6 Mnemonic FIDEx IDE Mnemonic RETURN RET RETURN C RET C RETURN NC RET NC RETURN Z RET Z RETURN NZ RET NZ RETURNI ENABLE RETI ENABLE RETURNI DISABLE RETI DISABLE ENABLE INTERRUPT EINT DISABLE INTERRUPT DINT
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Differences between Mnemonics of Instructions
ADDCY sX, sY ADDC sX, sY SUBCY sX, sY SUBC sX, sY INPUT sX, (sY) IN sX, sY INPUT sX, kk IN sX, kk OUTPUT sX, (sY) OUT sX, sY OUTPUT sX, kk OUT sX, kk COMPARE sX, sY COMP sX, sY
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Assembler Directives (FIDEx IDE)
#EQU yourConstant, 0x3A ; defines your constant #EQU yourRegName, s ; renames a PicoBlaze register #ORG ADDR, n ; sets the memory address of the following instruction to n #DEFINE case0 ; chooses among multiple program variants #IFDEF case0 ….. #ELSEIF case1 | case2 ..... #ENDIF
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Basic Data Movement Instructions
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Data Movement Instructions
C Z - - LOAD LOAD sX, sY sX <= sY LOAD sX, KK sX <= KK IMM, DIR
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Logic Instructions & Bit Manipulation
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Logic instructions C Z IMM, DIR IMM, DIR IMM, DIR AND AND sX, sY
sX <= sX and sY AND sX, KK sX <= sX and KK 2. OR OR sX, sY sX <= sX or sY OR sX, KK sX <= sX or KK 3. XOR XOR sX, sY sX <= sX xor sY XOR sX, KK sX <= sX xor KK IMM, DIR IMM, DIR IMM, DIR
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Perform the following operations in the assembly language of PicoBlaze
Questions Perform the following operations in the assembly language of PicoBlaze Set the most significant bit of the register s0 to 1 Clear two middle bits of the register s1 Toggle the least significant bit of the register s2
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Answers Set the most significant bit of the register s0 to 1
#EQU BIT7, 0x80 OR s0, BIT7 Clear two middle bits of the register s1 #EQU BITS43C, 0xE7 AND s1, BITS43C Toggle the least significant bit of the register s2 #EQU BIT0, 0x01 XOR s2, BIT0
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Arithmetic Instructions & Multiple-Byte Manipulation
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Arithmetic Instructions (1)
C Z Addition ADD sX, sY sX <= sX + sY ADD sX, KK sX <= sX + KK ADDC sX, sY sX <= sX + sY + CARRY ADDC sX, KK sX <= sX + KK + CARRY IMM, DIR
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Perform the following operation in the assembly language of PicoBlaze
Questions Perform the following operation in the assembly language of PicoBlaze Add two 3-byte numbers X=(x2, x1, x0) and Y=(y2, y1, y0), stored originally in registers (s2, s1, s0) and (s5, s4, s3), accordingly.
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Answer #EQU x0, s0 #EQU x1, s1 #EQU x2, s2 #EQU y0, s3 #EQU y1, s4
ADD x0, y0 ADDC x1, y1 ADDC x2, y2
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Arithmetic Instructions (2)
C Z Subtraction SUB sX, sY sX <= sX – sY SUB sX, KK sX <= sX – KK SUBC sX, sY sX <= sX – sY – CARRY SUBC sX, KK sX <= sX – KK – CARRY IMM, DIR
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Perform the following operation in the assembly language of PicoBlaze
Questions Perform the following operation in the assembly language of PicoBlaze Perform the subtraction X=X-Y, where X=(x2, x1, x0) and Y=(y2, y1, y0), and these variables are originally stored in registers (s2, s1, s0) and (s5, s4, s3), accordingly.
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Answer #EQU x0, s0 #EQU x1, s1 #EQU x2, s2 #EQU y0, s3 #EQU y1, s4
SUB x0, y0 SUBC x1, y1 SUBC x2, y2
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Shifts & Rotations
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Edit instructions - Shifts
*All shift instructions affect Zero and Carry flags
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Edit instructions - Rotations
*All rotate instructions affect Zero and Carry flags
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Perform the following operation in the assembly language of PicoBlaze
Questions Perform the following operation in the assembly language of PicoBlaze Perform the left shift (C, X) <= X << 1, where X = (x2, x1, x0) is stored in registers (s2, s1, s0), and the most significant bit of X is shifted into the carry flag.
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Answer #EQU x0, s0 #EQU x1, s1 #EQU x2, s2 SL0 x0 SLA x1 SLA x2
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and Program Flow Instructions
Test, Compare, and Program Flow Instructions
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Test and Compare Instructions
C Z TEST TEST sX, sY sX and sY => none TEST sX, KK sX and KK => none COMPARE COMP sX, sY sX – sY => none COMP sX, KK sX – KK => none IMM, DIR C = odd parity of the result IMM, DIR
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Program Flow Control Instructions (1)
JUMP AAA PC <= AAA JUMP C, AAA if C=1 then PC <= AAA else PC <= PC + 1 JUMP NC, AAA if C=0 then PC <= AAA else PC <= PC + 1 JUMP Z, AAA if Z=1 then PC <= AAA else PC <= PC + 1 JUMP NZ, AAA if Z=0 then PC <= AAA else PC <= PC + 1
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If-else statement C Assembly language if (s0 == s1) { ………. } else {
………..
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If-else statement C Assembly language if (s0 == s1) { COMP s0, s1 ……….
} else { ……….. COMP s0, s1 JUMP NZ, else_branch ……….. JUMP if_done else_branch: if_done:
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Switch statement C Assembly language switch (s0) { case value_1: ……….
break; case value_2: case value_3: default: }
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Switch statement C Assembly language switch (s0) { case value_1: ……….
COMP s0, value_1 JUMP NZ, case_2 ………. JUMP case_done case_2: COMP s0, value_2 JUMP NZ, case_3 case_3: COMP s0, value_3 JUMP NZ, default default: case_done: switch (s0) { case value_1: ………. break; case value_2: case value_3: default: }
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For loop C Assembly language for(i=MAX, i>=0, i--) { …………… }
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For loop C Assembly language for(i=MAX; i>0; i--) { …………… }
LOAD s0, MAX for_loop: ………. SUB s0, 1 JUMP NZ, for_loop for(i=MAX; i>=0; i--) { …………… } LOAD s0, MAX for_loop: ………. SUB s0, 1 JUMP NC, for_loop
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Subroutines & Interrupts
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Subroutine-Related Instructions
CALL AAA TOS <= TOS+1; STACK[TOS] <= PC; PC <= AAA CALL C | Z , AAA if C | Z =1 then else PC <= PC + 1 CALL NC | NZ , AAA if C | Z =0 then
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Subroutine-Related Instructions
RET PC <= STACK[TOS] + 1; TOS <= TOS - 1 RET C | Z if C | Z =1 then else PC <= PC + 1 RET NC | NZ if C | Z =0 then
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Subroutine Call Flow
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ECE 448 – FPGA and ASIC Design with VHDL
Interrupt Flow ECE 448 – FPGA and ASIC Design with VHDL
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Interrupt Related Instructions
RETI ENABLE PC <= STACK[TOS] ; TOS <= TOS – 1; I <= 1; C<= PRESERVED C; Z<= PRESERVED Z RETI DISABLE I <= 0; C<= PRESERVED C; Z<= PRESERVED Z EINT I <=1; DINT I <=0;
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Instructions Involving
Data Memory
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Data Movement Instructions
Involving Data Memory C Z - - STORE STORE sX, KK RAM(KK) <= sX STORE sX, sY RAM((sY)) <= sX DIR, IND - - FETCH FETCH sX, KK sX <= RAM(KK) FETCH sX, sY sX <= RAM((sY) DIR, IND
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Example 1: Clear Data RAM of the size of 64 bytes
;========================================================= ; routine: clr_data_mem ; function: clear data ram ; temp register: data, s2 RAM_SIZE EQU 0x ; size of RAM = 64 clr_data_mem: load s2, RAM_SIZE ; unitize loop index to 64 load s0, 0x00 clr_mem_loop: sub s2, 0x ;dec loop index store s0, s2 jump nz, clr_mem_loop ;repeat until s2=0 ret
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Input/Output Instructions
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Input/Output Instructions
C Z - - DIR, IND IN IN sX, KK sX <= PORT(KK) IN sX, sY sX <= PORT((sY)) OUT OUT sX, KK PORT(KK) <= sX OUT sX, sY PORT((sY)) <= sX - - DIR, IND
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Example 2: Clear External RAM of the size of 64 bytes
;========================================================= ; routine: clr_ext_mem ; function: clear data ram ; temp register: data, s2 RAM_SIZE EQU 0x ; size of RAM = 64 clr_ext_mem: load s2, RAM_SIZE ; unitize loop index to 64 load s0, 0x00 clr_mem_loop: sub s2, 0x ;dec loop index out s0, s2 jump nz, clr_mem_loop ;repeat until s2=0 return
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