Download presentation
Presentation is loading. Please wait.
Published byChloe MacLean Modified over 10 years ago
1
ABCN Pad ring V7.0 08/02/13F. Anghinolfi1 Revised for power names, io cell name, pads order and pad positions
2
ABC130 RIGHT SIDE 08/02/13 F. Anghinolfi LVDS R 200 LVDS R SIOGND 200 250 BC RLCK L0_COM R3_L1 200 CMOS ANA REG_A fake REG_D fake ShuntCtrl SIOGND 250 SIOGND 250 SIOGND 250 200 To FE To BE Chip edge 3150 um 2 380 um NPNPNPNP Except for Front-End bond pads are 95µm x 190µm
3
ABC130 BOTTOM SIDE 08/02/13 F. Anghinolfi Follow up on next slide -- LVDS BI 200 111 CMOS 111 CMOS Chip ID (5) XoffL DataL 111 CMOS 111 SIODVSS LVDS BI 200 SIOGND 111 SIODVSS 111 FastClk TERM To Bottom side Chip edge 111 1821 um Abut left pad of next slide 3 14+377 = 391 um 0 1 2 3 4 NPNPNP
4
ABC130 BOTTOM SIDE 08/02/13 F. Anghinolfi Follow up on next slide -- Digital Power/Ground (6 pads) Left Group SIOGND SIOVDD SIODVDD SIOGND SIOVDD SIODVDD 7*111 = 777 um SIODVSS DVSSBR GNDD VDDDDVDD GNDD VDDDDVDD DVSS Special Unit Abut left pad of next slide 4 All Power rings cut (BFMOAT) Distance from last supply here, DVSS to DVSSA in the next slide is 179 um
5
ABC130 BOTTOM SIDE 08/02/13 F. Anghinolfi Follow up on next slide -- Analog Power/Ground (15 pads) SIOGND SIOVDD SIODVDD SIOGND SIOVDD SIODVDD SIOGND SIOVDD SIODVDD SIOGND SIOVDD SIODVDD SIOGND SIOVDD SIODVDD 16*111 + 179 = 1955 um (a few microns shift is possible because of the BFMOAT insertion) GNDA VDDA AVDD GNDA VDDA AVDD GNDA VDDA AVDD GNDA VDDA AVDD GNDA VDDA AVDD SIODVSS DVSSA Abut left pad of next slide 5 All Power rings cut (BFMOAT) SIODVSS DVSSA
6
ABC130 BOTTOM SIDE 08/02/13 F. Anghinolfi SIOGND SIOVDD SIODVDD Digital Power/Ground (9 pads) Right group SIOGND SIOVDD SIODVDD SIOGND SIOVDD SIODVDD 9*111 = 999 um GNDD VDDDDVDD GNDD VDDDDVDD GNDD VDDDDVDD LVDS T 200 111 SIODVSS 111 LVDS BI 200 111 SIOGNDD 111 SIODVSS 111 FC1 FC2 DATR XOFFR Chip edge To Top side 1577 um 6 366+14 =380 um NPNPNPNP (a few microns reduction is possible because of the BFMOAT insertion)
7
Connection through chips 08/02/13 F. Anghinolfi 7
8
Backside Pads length 6 all5 all Left2022.51821+391 distance from chipedge to center of the first pad Digital Power Left1250777 Analogue Power25001955 Digital Power Right1125999 Right1567.51577+YYY distance from last pad center to chipedge 84657900
9
Ashley Rehearsal 4 slides 08/02/13F. Anghinolfi9 rather old
10
Front End Pads ABCn130 10 Pads 62 x 117 m 2 62 x 200 m 2 would allow two bond attempts Pitch 119 m side-to-side, 350 m row- to-row Stagger between rows is half pitch (59.5 m ) Have one additional bond pad per end of row for bond testing Leave 250 m on front edge to first bond 08/02/13F. Anghinolfi
Similar presentations
© 2024 SlidePlayer.com. Inc.
All rights reserved.