1. Matthias Bucher, Angelos Antonopoulos
Compact modeling of advanced bulk CMOS using EKV3 – linearity, RF and noise performance trends
Matthias Bucher, Angelos Antonopoulos
Technical University of Crete

2. Outline Physics-based, charge-based compact MOSFET model – EKV3 model
DC to RF modeling
IV, CV, Y-parameters
Linearity
RF figures of merit – evolution with technology
Thermal noise
Conclusions

3. EKV3 scalable model for high frequency
Scalability vs. channel length, number of fingers, bias
Gate- and substrate- parasitics scale with multi-finger layout
Layout-dependent stress effects
Non quasi-static model (NQS)
channel segmentation
consistent AC/transient
Thermal noise
Induced gate & substrate noise
Velocity saturation, CLM
Carrier heating

4. EKV3 configurations, channel-segmentation for NQS
Simple model – only internal accounting for (S,D) series resistance
Simple model with external series resistance
Simple RF model with gate and substrate resistance
Full RF model with substrate resistivity network
Full RF & NQS (channel segmentation) model.

5. Channel-segmentation for NQS effects
Multifinger device NMOS Lg = 2 um, saturation (110 nm CMOS) gm
gds
NQS
NQS
NQS
--- QS and ___ NQS EKV3 model, 45 MHz - 20 GHz

6. Layout-dependent parasitics

7. Multi-finger RF MOSFETs
Source=Bulk
Source=Bulk
150 μm pitch
Width of finger G G G G G
Gate
Drain G G G G G
Source=Bulk
Drain
Layout of RF multi-finger MOSFET
Number of fingers – NF
Finger Width – Wf
Gate Length – L
Ground-Signal-Ground (GSG) RF Pads
2 port configuration
Open-Short de-embedding structures

8. Layout dependence: STI stress in multi-finger RF MOSFETs
VDS=50m, 0.5, 1V
– EKV3
□ meas.
NMOS, L=180nm, Wf=2μm
Stress effects due to shallow-trench isolation (STI)
Threshold voltage VT vs. NF
Max. drain current ID / NF vs. NF

9. Edge conduction effectMI
Edge conduction effect dominant in Weak – Moderate Inversion
Leakage dramatically increased
Gm/ID is strongly affected – MI
EKV3 only available CM to cover this effect
L=2um, W=3um and VDS=1.2V

10. Static characteristics NMOS – EKV3 model
VDS=50m, 0.5, 1V
VGS=0.4, 0.6, 0.8, 1, 1.2V
– EKV3
□ meas.
NMOS, L=180nm, Wf=2μm, NF=4
ID-VG, gm-VG, gm.UT/ID – ID
ID-VD, gds-VD

11. Static characteristics PMOS – EKV3 model
-VDS=50m, 0.5, 1V
-VGS=0.4, 0.6, 0.8, 1, 1.2V
– EKV3
□ meas.
PMOS, L=180nm, Wf=2μm, NF=4
ID-VG, gm-VG, gm.UT/ID – ID
ID-VD, gds-VD

12. I-V NMOS; WF = 2um; LF = 65nm; NF = 40
ID , gm vs. VG
(saturation)
ID , gm vs. VG
(linear)
ID , gds vs. VD
gm/ID vs. ID
Measurements / EKV3 / BSIM4

13. I-V PMOS; WF = 2um; LF = 65nm; NF = 40
ID , gm vs. VG
(saturation)
ID , gm vs. VG
(linear)
ID , gds vs. VD
gm/ID vs. ID
Measurements / EKV3

14. Capacitance-voltage characteristics, EKV3 model
Long/short (L=10um, 90nm) gate and inversion capacitance, NMOS, PMOS.
M. Bucher e.a. Int. J. RF and Microwave CAE, 2008

15. Approximate Y-Parameters
MOS Transistor Modeling for RF Integrated Circuit Design
© C. Enz, March, 2002
Approximate Y-Parameters
Assuming wRgCgg << 1
To calculate the Y-parameters, we will neglect the substrate resistances
Since Rg can be made small, we can assume that wRgCgg is much smaller than unity for the frequency range to be considered
Cgg is the total capacitance seen at the gate
The Y-parameters are then given by
It is always useful and instructive to have analytic expressions for the Y-parameters
They can be used for direct extraction
For example Cgd can be directly extracted from the imaginary part of Y12
Cgg can be extracted from the imaginary part of Y11 and Rg can be extracted from the real part of Y11
These values can then be used as starting points for a more detailed extraction
These formula have been verified experimentally on a n-channel MOS transistor with 10 fingers, 12mm finger width and 0.36mm gate length
Can be used for direct extraction
MSM WCM Tutorial

16. Y-parameters vs. frequency – NMOS
VDS=0.3, VGS=0.3, 0.6, 1.2V
– EKV3
□ meas.
Real & Imaginary 2-port Y-parameters up to 30GHz
NMOS, L=180nm, Wf=2μm, NF=9
A. Bazigos e.a. Physica Status Solidi C, 2008

17. Y parameters vs. frequency – PMOS
– EKV3
□ meas.
VDS=-1.2V, -VGS=0.3, 0.6, 1.2V
Real & Imaginary 2-port Y-parameters up to 30GHz
L=180nm, Wf=2μm, NF=9
A. Bazigos e.a. Physica Status Solidi C, 2008

18. Scalability with channel length – NMOS
– EKV3
□ meas.
Y parameters for NMOS
L=110 nm, 180 nm, 250 nm, 450 nm, 1 um, 2 um
W=5 um, NF=10
VG=0.6V, VD=0.5V
M. Bucher e.a. Int. J. RF and Microwave CAE, 2008

19. Scalability with channel length – PMOS
– EKV3
□ meas.
Y parameters for PMOS
L=110 nm, 180 nm, 250 nm, 450 nm, 1 um, 2um
W=5 um, NF=10
VG=0.6V, VD=0.5V
M. Bucher e.a. Int. J. RF and Microwave CAE, 2008

20. Y-parameters NMOS; WF = 2um; LF = 65nm; NF = 40
VGS=0.8V; VDS={0.4, 0.6, 0.8}V; VSB=0V
Y11
Y12
Y21
Y22
real
imaginary
Measurements / EKV3 / BSIM4

21. Y-parameters PMOS, WF = 2um, LF = 65nm; NF = 40
|VGS|=0.8V;|VDS|={0.4,0.6,0.8}V;VSB=0V
Y11
Y12
Y21
Y22
real
imaginary
Measurements / EKV3

22. Linearity – small signalMI MI
Gm, Gm2, Gm3, PIP3, VIP3 vs. ID/Ispec
“Sweet Spot” is moving to lower levels of inversion with lower L!

23. Linearity – small signalMI MI
Evolution of P1dB, PIP3, vs. ID/Ispec for technology nodes to 22nm
“Sweet Spot” is moving to lower levels of inversion with lower L!
Good news: better linearity closer to VT.

24. Linearity – large signal (load-pull)
Pout & Gain vs. Pin
ZL = 50 Ohm, Pin = -20…5 dBm
Pout Contours
VGS = 0.8 V, VDS = 0.8 V , VSB=0 V,Pin = 5dBm
NMOS: L =65nm, W=2um, NF=10,
Freq=5.8GHz

25. General RF parameters

26. High-frequency parameters @5GHz vs. ID – NMOS
– EKV3
□ meas.
VDS=0.5, 1.2, 1.3V
|H21|, U, FT, Fmax, Re(Y21), Re(Y22) vs. ID
L=180nm, Wf=2μm, NF=9
A. Bazigos e.a. Physica Status Solidi C, 2008

27. High-frequency parameters @5GHz vs. ID – PMOS
– EKV3
□ meas.
-VDS=0.5, 1.2, 1.3V
|H21|, U, FT, Fmax, Re(Y21), Re(Y22) vs. ID
L=180nm, Wf=2μm, NF=9

28. High-frequency parameters NMOS vs. VG
RG=30 Ω
CGD=7.5 fF
CGS=7.5 fF
RB=103 Ω
CJD=11 fF
NMOS: L =65nm, W=2um, NF=10, F = 5 GHz, VGS = [0.2, …1.2] V, VDS = [0.2, …1.2] V

29. High-frequency parameters NMOS vs. VG
NMOS: L =65nm, W=2um, NF=10, F = 5 GHz, VGS = [0.2, …1.2] V, VDS = [0.2, …1.2] V

30. FT and Fmax evolution with technology

31. GM /ID·FT, GM2/ID and [GM /GDS·GM /ID FT]
The different FoMs behave in a similar way
Maximum in moderate inversion!
Trend towards lower levels (within moderate inversion)

32. GM /ID·FT and [GM /GDS·GM /ID FT] evolution

33. Thermal noise in MOSTs – EKV3 model

34. Thermal noise in MOSTs – EKV3 model

35. Short channel effects on thermal noise – EKV3 model

36. Thermal noise parameters

37. Noise in 2-port devices

38. Noise parameters vs. frequency – EKV3 model

39. Noise parameters vs. bias – EKV3 model

40. Thermal noise vs. bias & channel length – EKV3 model

41. Induced gate noise – EKV3 model

42. Thermal noise parameters – EKV3 model

43. Conclusions
EKV3: analog/RF IC design-oriented, charge-based, compact model
Model covers all aspects from DC to RF
Fully scalable with L, W, NF, bias, f, technology
Small/large signal including NQS
Noise
Simple model structure & parameter extraction
RF model validations
Vs. measurements in 180 – 110 – 90 – 65 nm CMOS.
Vs. TCAD to 22nm CMOS.
Implementations in: Spectre, ELDO, Smash, HSPICE (underway)

44. Conclusions Relation to advanced analog/RF IC design
Trend towards moderate inversion: optimum Gm/ID. FT, best noise/gain/linearity performance
Optimal RF CMOS (for LV-LP RFIC) performance shifted to lower levels of inversion (near-threshold) with CMOS technology approaching 22nm.
EKV3 model incorporates all necessary short-channel effects for correct RF Noise at mm-waves.

45. EKV3 publications EKV3 model, RFCMOS papers
A. Antonopoulos, M. Bucher, K. Papathanasiou, N. Mavredakis, N. Makris, R. K. Sharma, P. Sakalas, M. Schroter, Small-Signal and Thermal Noise Compact Modelling at High Frequencies, IEEE Trans. Electron Devices, Vol. 60, N° 11, pp , Nov
A. Antonopoulos, M. Bucher, K. Papathanasiou, N. Makris, N. Mavredakis, R. K. Sharma, P. Sakalas, M. Schroter, Modeling of High Frequency Noise of Silicon CMOS Transistors for RFIC Design, International Journal of Numerical Modelling, 2014.
A. Antonopoulos, M. Bucher, K. Papathanasiou, N. Makris, R. K. Sharma, P. Sakalas, M. Schroter, CMOS RF Noise, Scaling, and Compact Modeling for RFIC Design, Proc. IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Seattle, Washington, June 2-4, 2013.
S. Yoshitomi, A. Bazigos, M. Bucher, The EKV3 Model Parameter Extraction and Characterization of 90nm RF-CMOS Technology, 14th Int. Conf. on Mixed Design of Integrated Circuits and Systems (MIXDES), pp , Ciechocinek, Poland, June 21-23, 2007.
M. Bucher, A. Bazigos, S. Yoshitomi, N. Itoh, A Scalable Advanced RF IC Design-Oriented MOSFET Model, Int. Journal of RF and Microwave Computer Aided Engineering, Vol. 18, N° 4, pp , 2008.
M. Bucher, A. Bazigos, An Efficient Channel Segmentation Approach for a Large-Signal NQS MOSFET Model, Solid-State Electronics, Vol. 52, N° 2, pp , Feb

46. EKV3 publications EKV3 model, general papers
K. Papathanasiou, N. Makris, A. Antonopoulos, M. Bucher, Moderate inversion: analogue and RF benchmarking of the EKV3 compact model, 29th Int. Conf. on Microelectronics (MIEL), Belgrade, Serbia, May 12-15, 2014.
C. Enz, E. Vittoz, Charge-based MOS Transistor Modeling, The EKV model for low- power and RF IC design, Wiley, 2006.
J.-M. Sallese, M. Bucher, F. Krummenacher, P. Fazan, Inversion Charge Linearization in MOSFET Modeling and Rigorous Derivation of the EKV Compact Model, Solid-State Electronics, Vol. 47, N° 4, pp.  , Apr. 2003

47. Thank you for your attention
Acknowledgments:
Contact: Electonic and Computer Engineering Technical University of Crete Chania 73100, Greece