1. Key Stage 3-4
555 ic
Using a (555 IC) as a Monostable / Astable Circuit
555 IC
Live Wire / PCB Wizard - (555 IC) Circuit
RA Moffatt

2. The 555 Timer IC - 1 The 555 timer IC is an integrated circuit.
Can function as monostable or astable circuit (requires the addition of external resistors and capacitors).
Two main types available:
bipolar
CMOS.
Advantages for their use:
they have a high output current, allowing relatively large loads to be driven directly.
Ability to produce accurate and repeatable time periods.

3. The 555 Timer IC - 2
Ground 1 8
+VS
Trigger 2 7
Discharge
555
Output 3 6
Threshold
Reset 4 5
Control Voltage
Pin diagram for the 555 timer IC
Both ICs operate from a wide voltage range ( V for bipolar, 2-15V for CMOS).
CMOS require less current to operate than the bipolar but are more expensive to purchase.

4. The 555 Monostable Timer IC - 13 8 4 7 6 2 1 5
555 0V 5V
10K R
1K
10nF C
The 555 monostable

5. The 555 Monostable Timer IC - 2
A resistor and a capacitor are added to the IC.
When device is triggered (pin 2) on a falling edge (logic 1 to logic 0), the output (pin 3) goes high for a time given by the equation:
monostable period T = 1.1CR
where C is in farads (F), R in ohms () and T in seconds.
Once triggered, the 555 output remains high until the end of the monostable period.

6. The 555 Monostable Timer IC - 3
For a monostable action:
monostable period must be longer than the trigger pulse.
A 10nF capacitor coupling pin 5 with 0V is needed to prevent the circuit from false triggering.
A 555 timer can produce brief dips of voltage on the supply line. If logic gates are used with 555 timers, a large-value (100nF) electrolytic capacitor should be connected across the power supply (negative terminal of capacitor to 0V) to eliminate the voltage change; decoupling the supply.

7. The 555 Monostable Timer IC - 4
For a monostable action:
if electrolytic capacitors are used for C, their working voltage should be close to (but more than) the supply voltage.
Recommended range of values for R is between 1K and 1M, and for C between 10nF and 10F.
If electrolytic capacitors are used, their high leakage current and poor tolerance may result in the timing period being a long way from that predicted by the formula.

8. The 555 Astable Timer IC - 1
A 555 timer can be used in ‘astable’ mode.
Trigger pin (pin 2) is connected to pin 6.
At the end of the first pulse, the trigger is connected low again, starting another pulse.
R2 is needed to prevent C discharging too quickly, which make the space-time too short.

9. The 555 Astable Timer IC - 2 Mark-time t1 = 0.7(R1 + R2)C
Space-time t2 = 0.7R2C
Astable period T = t1 + t2
Astable frequency f = 1 /t1 + t2

10. The 555 Astable Timer IC - 3 The 555 astable 3 8 4 7 6 2 1 5 555 0V 5V
1K
10nF C R2

11. The 555 Astable Timer IC - 4
Basic circuit will not allow a mark-to-space ratio of 1:1 since the mark-time is always greater than the space-time.
If R1 = 1K and R2 = 1K the output wave form is almost a square wave, with a 1:1 mark-to-space ratio.

12. Summary
A monostable produces a single pulse for a time determined by an RC network.
Logic gate monostable period = 0.7CR
555 monostable period = 1.1CR
An astable produces a continuous pulse; the frequency is determined by an RC network.

13. Summary Frequency, f = 1 / T Logic gate astable period, T  2CR
Astable period = mark-time + space-time
T = t1 + t2
Frequency, f = 1 / T
Logic gate astable period, T  2CR
555 astable:
t1 = 0.7(R1 + R2)C
t2 = 0.7R2C