2. What Computers Can and Cannot Do
Computers deterministically perform instructions
No creativity, intuition, etc.

3. The Fetch/Execute Cycle
“Instruction Execution Engine”
Fetch/Execute Cycle
Fetch next instruction
Decode
Gather needed data
Perform op
Save result
Repeat

4. A Five-Step Cycle
Ops repeat forever

5. Anatomy of a Computer All computers have Memory, Control unit,
Arithmetic/logic unit (ALU),
Input unit, and
Output unit

6. Principal Subsystems of a Computer

7. 1. Memory
Memory
Code and data
Sequence of cells to hold bytes

8. 1. Memory Addresses Values Finite capacity 0 to 232 – 1 (32-bit CPU)

9. Byte-Size Memory Location
Discrete locations are shown as 1B boxes

10. Byte-Size Memory Location
Location can store 8-bits
ASCII character
Number (how big?)
Block of four bytes is word

11. Random Access Memory Random access memory (RAM)
Order and time of access
Measured in MB or GB

12. 2. Control Unit Control unit
Circuitry handles Fetch/Execute Cycle
Typical machine instruction ADD 4000, 2000, 2080

13. 2. Control Unit ADD 4000, 2000, 2080 Sums all three #s?
OP Dest, Src1, Src2

14. Illustration of a single instruction

15. 3. Arithmetic/Logic Unit (ALU)
ALU does math
Uses logic gates (AND, OR, NOT)
+, -, *, /, etc.

16. 4. And 5. Input and Output Units
Info => computer
Output
Info => User
Useless without

17. The Peripherals Peripherals connect to I/O ports
Not considered part of computer
Encode or decode info b/w computer and physical world

18. The Peripherals Keyboard Monitor
Encodes keystrokes
Monitor
Decodes memory
Peripherals handle physical part of operation

19. Portable Memory & Hard Drives
Storage peripherals can do both I/O
USB memory
Hard disks/drives

20. Hard Disk Hard disk stores programs and data
Large capacity relative to RAM
Slow relative to RAM
Programs/data must reside in RAM for use

21. A Device Driver for Every Peripheral
Most peripheral devices are “dumb”
Need drivers
Video card, monitor
Printer
Mouse, keyboard

22. The Program Counter: The PC's PC
Program counter (PC)
Maintains address of next instr.
Instr Fetch (IF)
Instr. = MEM[PC]
PC = PC + 4

23. Branch and Jump Instructions
Next instr. may not come after previous
Instr. may change PC
Jump
Branch

24. Instruction Interpretation
Process of executing a program is instruction interpretation
Our language => computer language

25. The Fetch/Execute Cycle
A five-step cycle:
Instruction Fetch (IF)
Instruction Decode (ID)
Data Fetch (DF) / Operand Fetch (OF)
Instruction Execution (EX)
Result Return (RR) / Write Result (WR) / Store (ST)

26. ADD 800, 428, 884

27. Instruction Fetch (IF)
Instr = MEM[PC]
PC is 2200
Control Unit (CU) holds instr.
Bits of instr are decoded
PC updated

28. IF
ADD 800, 428, 884

29. Instruction Decode (ID)
Decoder
Determines op to perform
Sets up ALU
Determines operand addresses
Sources
Destination
Passes to data fetch stage

30. ID +
ADD
800
428
884

31. Data Fetch (DF) Read data from memory SRC1 = MEM[SRC_ADDR1]

32. DF 42 12

33. Instruction Execution (EX)
Performs op indicated by ID
RES = SRC1 OP SRC2
Result held in ALU

34. EX 54

35. Write Result (WR) Writes result to memory MEM[DST_ADDR] = RES
Cycle begins again

36. RR 54