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Condition Monitoring for Power Electronics Reliability (COMPERE)

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Presentation on theme: "Condition Monitoring for Power Electronics Reliability (COMPERE)"— Presentation transcript:

1 Condition Monitoring for Power Electronics Reliability (COMPERE)
Shaoyong Yang Angus Bryant Phil Mawby July 18th 2008 1

2 Progress since last ESR meeting
1. literature survey: a review paper drafted as part I. Questionnaire: a report based on 56 responses; a paper being drafted. A webpage for COMPERE Simulation work plan ready for discussion. Preliminary simulation with power device thermal models in Matlab/Simulink & Saber. Others: ECPE workshop in Toulouse, June LSA/MSA workshop at Aston University, 10 July 2

3 Simulation work plan Select a model (done)
A control programme in plecs (tried). heat sink + packaging to be considered. A lifetime interpreter. 3

4 Saber thermal models Dynamic model, IRG families all encrypted.
IGBT self-heat (based on Hefner’s several papers). Assumptions, e.g., linear drift charge  less accurate. Saber model can only work as a comparison! 4

5 Matlab/simulink model (1)
Compact modelling of IGBTs and diodes. Angus and Phil developed. Integrated device optimisation & parameter extraction. Proven for a wide range of conditions. Full temperature dependency, –150°C to +150°C. Excess carrier density modelled: Critical to on-state and switching behaviour. Ambipolar diffusion equation (ADE) describes carrier distribution. Fourier series used to solve ADE. Boundary conditions set by depletion layers, MOS channel, emitter recombination, etc. 5

6 Matlab/simulink model (2)
Excess carrier density (stored charge) is one-dimensional for 90% of CSR. Fourier series solves 1D carrier density p(x,t) in CSR: Fourier terms pk(t) solved by ordinary differential equations Boundary conditions: CSR edges x1,x2 and gradients dp/dx (set by currents). Depletion layer voltage Vd2 provides feedback to keep p(x2)=0. Classic MOS model used to determine e- current In2. 6

7 Matlab/simulink model (3)
Base region resistance (conductivity modulation) Emitter recombination (injection) Carrier storage region (CSR) with Fourier series solution Depletion layer equations Classic MOSFET model Miller capacitance Kelvin emitter inductance 7

8 Simulation controller
Simulation work Parameterisation of models using a chopper cell. Look-up table (LUT) generation file (2b delivered) If (V, I) belongs to the LUT, use it; Otherwise re-run and generate it. Parameterisation of heat-sink using an inverter leg (2b delivered) . Converter simulation Look-up table Simulation controller EXTERNAL CONDITIONS LOSS DATA Device temp. Power diss. Heatsink model Compact models System modelling Device modelling 8

9 Parameterisation of power devices (1)
Parameterise power devices using the chopper cell circuit - Initial fit by hand - All parasitics required (esp Ls) - C&R: use if necessary; otherwise C=100pF,R=100Ohm. - Switching and on-state matching to parameterise devices. 9

10 Parameterisation of power devices (2) previous work
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11 Temperature effect previous work
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12 Power converter modelling (1)
Look-up table: - Generated from device models. - Gives losses as a function of load current and temperature. - Simple converter/heatsink model simulates device temperature. - Rapid and accurate estimation of device temperature for whole load cycle. 12

13 Power converter modelling (2)
Plecs: combined electrical and thermal simulation of power electronic systems in Simulink Power devices like simulink models, but with thermal info, e.g., diode: Vf, Ron, Thermal (Pon,Poff, Pcon,Rth, Cth) 13

14 Full system simulation
Standard Federal Urban Driving Schedule. Simple drive model gives inverter electrical conditions. Resulting IGBT temperature profile plotted in relation to the vehicle speed. Peaks in temperature correspond to acceleration/deceleration. 14

15 Thermal mechanical model
Rth variation model Stress-strain plot 15

16 Experimental work Thermal cycling
An environmental chamber to add thermal stress on devices. include new, ageing and partly faulted ones. Passive tests may be tried to study the solder fatigue. 2. Power cycling tests (PCT) To check the bond wire lift-off (VCE,sat) + solder fatigue (Rth) Issues: To obtain test samples and borrow industrial expertises. To discuss with Durham on the test conditions for PCTs. 16

17 Future work A target system as a benchmark
Clarify topologies, power ratings and work conditions Select target devices and parameterise them. Carry out converter simulations. Development of thermo-mechanical model Further literatures. Any test information? 3. Experimental work to be carried out First to parameterise the power devices, and then to study the packaging reliability. 17

18 Thank you for your attention!
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