1. Section 8
Address Translation
March 10th, 2017
Taught by Joshua Don

2. Definitions
Virtual memory: A memory management technique in which each process believes it has access to a full set of virtual addresses. The OS maintains a mapping of virtual addresses to physical addresses.
Benefits: Memory isolation between processes, easy to understand from point of view of process
Downsides: More overhead and extra logic to convert a virtual address to a physical address
Page table: A data structure used by the OS to map virtual addresses to physical addresses
Multilevel page table: Your 61C page table on steroids
TLB (translation lookaside buffer): A cache for recently accessed page table entries

3. What is a virtual address?
Suppose a 16 bit virtual address space
Process uses the address:
VPN
Offset
Use VPN as index into the page table. Grab the PPN at that index
Physical address is PPN + Offset

4.
11100
Physical address
100100

5. Recall from 61c: Single level page table
Each entry in the page table contains the PPN, as well as some extra info bits (modified, present, access modifiers, etc.)
Page table size grows with number of virtual pages

6. Some formulas Virtual address bits = VPN bits + Offset bits
Physical address bits = PPN bits + Offset bits
Offset bits = log2(page size)
VPN bits = log2(number of PTE in page table)
PPN bits = log2(number of physical pages)
PTE bits = PPN bits + Extra bits (dirty, valid, etc.)
# PTE per page = page size / PTE size
# physical pages = physical memory size / page size

7. Recall from 61c: TLB
The TLB is a cache for the page table

9. Multilevel page tables
A page table entry either points to the actual data page, or it points to another page table
Split the virtual address into several VPN fields, where the i’th VPN is the index into the i’th level page table
Now, we don’t need the entire page table in memory (we only need a small part of it), because we’ve split it up
We also don’t need to allocate space for the entire page table at the start; allocate pages for the page table as necessary

10. Multilevel page tables
Virtual address of the form:
Physical address
1110
1010
1111

11. Inverted Page Tables
The size of a page table normally scales with the size of virtual memory
In an inverted page table scheme, page table size is instead determined by the size of physical memory (usually MUCH smaller!)
Inverted page table is a global system page table
One entry per physical page
Each entry contains a list of (PID, VPN)
Linear inverted page table
Search through each entry until find an entry matching (current PID, VPN)
Slow search
Hashed inverted page table
Hash the PID/VPN to get the entry of the page table
O(1) lookup, but more overhead with hashing algorithm

12. Virtual address