1. Array multiplier
TU/e Processor Design 5Z032

2. Division flow chart
TU/e Processor Design 5Z032

3. Division algorithm
TU/e Processor Design 5Z032

4. Floating point registers
TU/e Processor Design 5Z032

5. Floating point addition
TU/e Processor Design 5Z032

6. Floating point multiplication
TU/e Processor Design 5Z032

7. Floating point division
TU/e Processor Design 5Z032

8. BCD arithmetics
TU/e Processor Design 5Z032

9. BCD adder
TU/e Processor Design 5Z032

10. Decimal arithmetics
TU/e Processor Design 5Z032

11. Decimal arithmetics
TU/e Processor Design 5Z032

12. Multiplication and division
TU/e Processor Design 5Z032

13. TU/e Processor Design 5Z032

14. Decimal Division
TU/e Processor Design 5Z032

15. UNIVERSITY QUESTIONS
NOV_2012_REGULAR
1. (a) Explain the one stage decimal arithmetic unit.
(b) Explain the flow chart of decimal multiplication and decimal division operations.
2. (a) Write short notes on array multiplier.
(b) Explain the operation of restoring division with flow chart.
3. (a) Draw a flow chart for multiplication of floating point numbers and explain it.
(b) Explain the sign magnitude representation and 2’s complement representation of a number. What are the advantages of 2’s complement representation over sign magnitude representation?
4 (a) What is a Booth’s algorithm for 2’s complement multiplication? Explain with an example.
(b) How many bits are needed to store the result addition, subtraction, multiplication and division of two n-bit unsigned numbers?
TU/e Processor Design 5Z032

16. UNIVERSITY QUESTIONS APRIL_2012_SUPPLY:
1. (a) Perform the following arithmetic subtractions using 9’s and 10’s complement representation: i) ii)
(b) With the help of diagram explain parallel decimal addition.
NOV_2011_REGULAR
1. (a) Write the Booth’s algorithm for multiplication of signed-2’s complement numbers.
(b) Design an array multiplier that multiplies two 2-bit numbers.
2 (a) Explain the working of a 2-bit by 2-bit array multiplier with a neat diagram.
(b) Write the algorithm for addition and subtraction of floating-point binary numbers.
3. With an example explain multiplication of two fixed point binary numbers using Booth’s algorithm. Also draw the hardware circuit for implementing the same.
4. Draw the flowchart for division of two fixed point numbers when negative numbers are in signed-magnitude representation and explain with an example.
TU/e Processor Design 5Z032