1. Capture the Light. An Integrated Photonics Design Solution from Cadence, Lumerical and PhoeniX Software
IMPLEMENTING PHOTONIC INTEGRATION
54th DAC. Tuesday June 20th 2017
© Cadence, Lumerical Solutions Inc, PhoeniX Software

2. Integrated Photonics is growing in a variety of markets
© Cadence, Lumerical Solutions Inc, PhoeniX Software

3. Driven by our customers…
Our customers have come to us and have asked for help to provide a unified platform to enable productive, repeatable, familiar design flows, involving photonics and accessible to their general designer community.
As you are maybe aware, there was press release earlier this morning announcing the collaboration of Cadence / Lumerical and PhoeniX software.
Maybe you have seen the press release from this morning. Cadence / Lumerical and PhoeniX software have announced to offer a virtuoso centric EPDA flow.
Layout approaches for <10 components, what do you intend to say? Do you mean layout or perhaps better: design (combination of simulation and layout…)
Luxtera developed this 10 years ago, because of a lack of commercial tools back than
8) Demonstration of a fast-reconfigurable silicon CMOS optical lattice filter Ibrahim, Salah; Fontaine, Nicolas K.; Djordjevic, Stevan S.; Guan, Binbin; Su, Tiehui; Cheung, Stanley; Scott, Ryan P.; Pomerene, Andrew T.; Seaford, Liberty L.; Hill, Craig M.;Danziger, Steve; Ding, Zhi; Okamoto, K.; Yoo, S. J. B. Optics Express, vol. 19, issue 14, p
 Lattice consists of 6 phase shifter, 4 directional couplers
9 ) Michael Watts Group 2013
J.Sun et al. Large-scale nanophotonic phased array, Nature
4096 attenas, each of them has one heater, one grating coupler, and one direction coupler
 + 64*8 directional couplers from the bus
© Cadence, Lumerical Solutions Inc, PhoeniX Software
© Cadence, Lumerical Solutions Inc, PhoeniX Software

5. Integrated photonics Waveguides are “fibers on a chip”
Silicon photonics applies high-index contrast waveguides
- submicron dimensions
- small bend radii
- high-density photonics (> components/chip)
Courtesy of Wim Bogaerts, Ghent University

6. Some integrated photonics components
Waveguide
Electro-optic modulator
Photodetector
Laser
© Cadence, Lumerical Solutions Inc, PhoeniX Software

7. Design challenges: photons ≠ electrons
Photonics is alike RF electronics (193THz; 1550nm)
Need for dedicated simulation routines
Optical signal: propagates bidirectionally (reflections!), is multi- mode, in multiple frequency bands and accumulates a phase
Requires curvilinear layout implementation
© Cadence, Lumerical Solutions Inc, PhoeniX Software

8. Photonic Layout Generation
System Simulation
Component-Level Design
Fab
FDTD Solutions
Nanophotonic Design Environment
DEVICE
Charge and Heat
Transport Design
Environment
INTERCONNECT
Photonic Integrated Circuit Design Environment
GDSII
Final (batch) DRC/LVS
MODE Solutions
Waveguide Design Environment
Mask layers
Design rules
Symbols
Compact models
SKILL Pcells and device-fixed layouts
Spectre®
Electrical Simulation
PDK
Virtuoso® Layout Suite XL
Virtuoso Analog Design Environment
Virtuoso Custom Design Platform
Virtuoso Schematic Editor
Photonic Layout Generation
OptoDesigner 5
Photonic IC Design Suite
Curvilinear layout
Parameterized primitives and photonic building blocks
Waveguide and component creation
Discretization

9. Virtuoso driven Schematic Design
Electro-optic oscillator
Schematic driven layout
Design capture – single golden schematic
Define and capture electrical and optical signals
Electrical and optical components defined by PDK library
Simulation models, design rules, error checking
Simulate optical and electrical response
Using Lumerical INTERCONNECT and Spectre
Visualize all results in Virtuoso
The co-simulation capability is necessary for design with electro – optic feedback loops as the example of an electro –optic oscillator demonstrates.
First we start with schematic capture of both the electrical and optical circuit within Virtuoso. Here the electrical circuit consists of a simple TIA, a gain amplifier, and some voltage sources. The optical circuit is defined as a subcircuit with components like a cw laser, modulator, time delay and photodiode taken from a generic photonic PDK.
To netlist and run the simulation in spectre, the optical subcircuit is automatically embedded into a VerilogA wrapper. A netlist for the optical subcircuit is generated and sent to INTERCONNECT.
For each time step in the Spectre simulation, data is pushed and pulled through the Verilog DPI – INTERCONNECT API interface
The seamless integration within Cadence’s analog design Environment does not only allow to run the simulation but also to visualize the results. Here we plot the output signal for three different gain of the amplifier. The optical time delay determines the period of the oscillation.
Laser
Modulator
Photo diode
Electrical Schematic
Optical signal type
Waveguide delay line
Optical Subcircuit
© Cadence, Lumerical Solutions Inc, PhoeniX Software

10. Photonic Layout Generation
System Simulation
Component-Level Design
Fab
FDTD Solutions
Nanophotonic Design Environment
DEVICE
Charge and Heat
Transport Design
Environment
INTERCONNECT
Photonic Integrated Circuit Design Environment
GDSII
Final (batch) DRC/LVS
MODE Solutions
Waveguide Design Environment
Mask layers
Design rules
Symbols
Compact models
SKILL Pcells and device-fixed layouts
Spectre®
Electrical Simulation
PDK
Virtuoso® Layout Suite XL
Virtuoso Analog Design Environment
Virtuoso Custom Design Platform
Virtuoso Schematic Editor
Photonic Layout Generation
OptoDesigner 5
Photonic IC Design Suite
Curvilinear layout
Parameterized primitives and photonic building blocks
Waveguide and component creation
Discretization

11. Photonic IC layout
Curvilinear / non-Manhattan layout requires all angle design features (location of ports, rotation, smooth curves, connectivity)
Advanced gridding and fracturing of polygons
“Phase aware” waveguide routing
Generic building blocks supporting customized design
Photonic Synthesis

12. Virtuoso driven Layout Implementation
Virtuoso PDA-Link to OptoDesigner
Coming with SKILL context and supporting tools to improve PIC design efficiency
Provides proper waveguide stitching, under all angles, to create composite waveguide layouts
Adds a complete library of parametrized photonics primitives and components
Adds the pxConnector family of waveguide connectors
Provides information for back annotation into the circuit simulation
Virtuoso® Layout Editor XL
OptoDesigner 5
Photonic IC Design Suite
Photonic Layout Generation
Curvilinear layout
Parameterized primitives and photonic building blocks
Waveguide and component creation
Discretization
© Cadence, Lumerical Solutions Inc, PhoeniX Software

13. Video: any angle rotation
© Cadence, Lumerical Solutions Inc, PhoeniX Software

14. Photonic Layout Generation
System Simulation
Component-Level Design
Fab
FDTD Solutions
Nanophotonic Design Environment
DEVICE
Charge and Heat
Transport Design
Environment
INTERCONNECT
Photonic Integrated Circuit Design Environment
GDSII
Final (batch) DRC/LVS
MODE Solutions
Waveguide Design Environment
Mask layers
Design rules
Symbols
Compact models
SKILL Pcells and device-fixed layouts
Spectre®
Electrical Simulation
PDK
Virtuoso® Layout Suite XL
Virtuoso Analog Design Environment
Virtuoso Custom Design Platform
Virtuoso Schematic Editor
Photonic Layout Generation
OptoDesigner 5
Photonic IC Design Suite
Curvilinear layout
Parameterized primitives and photonic building blocks
Waveguide and component creation
Discretization

15. Component-level simulation
© Cadence, Lumerical Solutions Inc, PhoeniX Software
Component-level simulation
The design and analysis of fundamental passive and active optoelectronic building blocks requires various solvers:
Optical
Electrical
Thermal
The design and analysis of fundamental passive and active optoelectronic building blocks requires various solvers:
Optical solvers to simulate the interaction of EM wave with material
Propagation properties, generation rates, absorption, …
Electrical solvers to model charge transport
DC, large/small signal analysis, transient, …
Thermal solvers to model heat transfer
Steady state and transient, self-heating, …
Stress and strain
Process simulation
Doping profiles, lithography correction, etch profile, sidewall angle, roughness
Extract accurate, and calibrated compact models from simulations and measured data for circuit simulation.
Extract accurate, and calibrated compact models from simulations and measured data for circuit simulation.

16. Video: Schematic Driven Layout (SDL) methodology: Back annotation and re-simulation using ADE-XL
© Cadence, Lumerical Solutions Inc, PhoeniX Software

17. © Lumerical solutions inc
Summary
There is clear advantage to combine EDA and PDA tools to deliver a complete and efficient design solution for Integrated Photonics
Remember: photonics is not the same as electronics
New signal types
Allows segregation (and automation) of electrical vs. optical (V,I vs TE and TM,…)
Dealing with curvilinear shapes
Including discretization challenges
A waveguide is usually a complex 3D structure vs. a wire in electronics
Typically a waveguide will be modeled as a device, not a piece of “interconnect”
Optical connectivity is NOT the same as electrical connectivity
2 electrical signals crossing make a short... 2 optical waveguides crossing make ... a crossing