1. Hands On SoC FPGA Design
Class 2: Downloading, Installing and Running Design Software
July 21st, 2015 Warren Miller

2. Course Overview SoC FPGAs combine a processor with programmable fabric
These powerful products are popular solutions for performance oriented applications.
This class will get you ‘hands on’ with the Xilinx Zynq™ 7010 SoC FPGA.
Use the free tools and/or the optional Digilent ZYBO Zynq Board available from Digi-Key
Just about every FPGA manufacturer now offers devices that feature a combination of programmable fabric and fixed function processors on a single device. These are commonly called SoC FPGAs. These powerful products can be used in a wide variety of applications and are growing in popularity in performance oriented applications. This class will help you get more familiar with the capabilities of SoC FPGAs by getting ‘hands on’ with an example SoC FPGA- the Xilinx Zynq™ 7010 SoC FPGA. Students can use the free tools and follow along with the class example designs to learn how to develop applications using SoC FPGAs. Optionally, a development board- the Digilent ZYBO Zynq Board available from Digi-Key, can be used to run the class examples on actual hardware.

3. This Week’s Agenda
7/20/15 An Introduction to SoC FPGAs 7/21/15 Downloading, Installing and Running Design Software 7/22/15 A Simple Example Design 7/23/15 Targeting the Development Board 7/24/15 Processor and FPGA- the full flow

4. Today’s Goals and Objectives
Get you going with free design software for SoC FPGAs.
Download
Install
Understand simple design flow
Resources
This class will go step by step through the process of obtaining and using a typical SoC FPGA design tool chain. The Xilinx Vivado 30-day evaluation will be used and students are encouraged (optional) to download and install the software to follow along with the rest of the classes.

5. Tools Overview All devices have the following tools: Software Hardware
Architecture Specification
Define the target MCU architecture
Processor Code
Write code in “C” or Assembly
FPGA Design
Write code in HDL, IP Cores, etc.
Hardware
Evaluation and Development boards
Documentation, Training, etc.

6. Microsemi System Builder
For the MCU portion of the design
Specify, select and connect required peripherals
Automatically include SmartFusion2 peripheral drivers 
Use familiar IDEs for embedded code development
Create a known-good MCU Subsystem – speed code development
For the FPGA part of the design
Automate key tasks- correct by construction starting point
Instantiate required IP cores from the SmartFusion2 catalog
Hook-up clocks and resets; Initialize peripherals
Populate the software projects with the required firmware
Use established and familiar FPGA tools (Design, Synthesis, Simulation, Debug, etc)
Key Goals:
System Builder is the first stage of an integrated tool flow
Quick learning curve for existing FPGA and MCU designers  
Allow embedded designers to evaluate the processor aspect of the device standalone
Allow FPGA designers to evaluate the FPGA aspect of the device standalone
Allow the two designers to work in parallel on the same device without schedule risk
Produce a “Correct by Construction” base system that dramatically speeds software development
Can be used as is or as a starting point for further customization

7. Guided Development
Asks the user basic questions on system architecture
Covers all elements of the architecture (nothing missed)
Builds on previous answers- defines only needed elements (error proof)
Generates Correct by Construction output when finished
Next use Standard Libero® flow or preferred IDE
Key Device Elements:
Memory
MSS DDR
Fabric DDR
Serial Interfaces
Flash Memory Clients
Memory Element Options:
DDR Memory
DDR2/3 LPDDR
Initialization time
Controller options
Fabric DDR
As above
Embedded Flash
Partitions
The main categories used to group architecture definition tasks within System Builder are listed below:
Key Device Options: Select which memory features will be included in the design- MSS DDR, Fabric DDR, High-Speed Serial Interfaces and Flash Memory Storage Clients.
Memory Options: Define the characteristics of the previously selected memory elements- For MSS External Memory select the type of standard (DDR2, DDR3, LPDDR), the initialization time, and various memory controller configuration options. For Fabric DDR memory make similar selections to the MSS External Memory. For Embedded Flash selections are presented to define the various partitions desired.
Peripheral Options: Define the characteristics of the available peripherals based on previous selections. The detailed definitions are grouped into categories (MSS Master, MSS Peripherals, Fabric Slave and Fabric Master) within which specific peripheral characteristics are selected.
Clock Options: Define the characteristics of the available clock sources based on previous selections. Detailed definitions are selected to configure resources like the FPGA fabric input clock, dedicated clock input, on-chip 1 MHz RC oscillator and external main crystal oscillator.
MCU Options: Define the characteristics for microcontroller options such as the Cortex-M3 processor, cache controller, AHB bus matrix, watchdog timer, real time counter and peripheral DMA controller.
SECDED Options: Define the characteristics for error correction and detection options for the eSRAM, Cache, Ethernet buffers, USB, CAN and DDR buffers. 7

8. Libero® SoC Development Flow
Comprehensive Tool Suite for FPGA Design
SmartDesign design entry
Synplify Pro® synthesis
ModelSim® simulation
Power-driven place-and-route
SmartPower power analysis
SmartTime timing analysis
Flashpro 4 program/debug

9. Design Flow- FPGA
Define Project
Use SmartDesign Canvas
Simulate

10. Libero® SoC Development Flow
Comprehensive Tool Suite for MCU Design
SoftConsole Eclipse-based IDE
GNU C/C++ compiler, GDB Debugger
Free download from Microsemi SoC website
Keil MDK – Microcontroller Development Kit
Combines the ARM C/C++ Compiler
With popular µVision4 debug
IAR Embedded Workbench
First standard compiler for industrial and 8 bit processors

11. Libero® MCU
Define Project with Template
MSS Block Diagram

12. Libero® MCU
Complete Design Entry
Run in SoftConsole

13. Xilinx Vivado Design Suite
Vivado Design Suite Evaluation
Free for 30 days 
Get the free 30 day license
Vivado WebPACK Edition
Free
Basic Features
Supports Zynq-7000
No Logic Analyzer, No Serial I/O Analyzer, No debug IP, No High-Level Synthesis, No System Generator for DSP
Suggest you download Evaluation Version

14. Download http://www.xilinx.com/support/download.html
Windows 64 or Linux 64
Web Installer- Configure Install
Then Click Install!
Use Vivado help menu to add devices and features
Check for updates

15. License
To access the Product Licensing Site directly, go to . You must first register or enter your registration information.
Selecting Products
To begin the license generation process for products you have purchased or want to evaluate:
Select a product licensing account from the Account drop-down list. Note: This selection is not available if you are entitled to evaluation or free products only.
Enter product voucher codes for design tools or IP product licenses purchased with kits or for tools purchased from the Xilinx online store (optional).
Add evaluation or no-charge IP product entitlements to the product entitlement table (optional).
Make your product selections from the product entitlement table.
The type of product entitlements available are Full (purchased), No Charge, or Evaluation. Full and No Charge licenses have a subscription period of one year. Design tools evaluation is for 30 days. IP evaluations are for 120 days.
Floating and node-locked licenses cannot be combined in the same license key file.

16. Download SDK
Download SDK Here Many Videos
Video Overview

17. Zynq Software Tools

18. Zynq Software Details
Xilinx XPS GUI-driven configuration of Zynq designs
Exports configuration for auto-generation of First Stage Boot-loader, Bare metal BSP and Linux BSP
Software Development Kit (SDK)
Based on Eclipse and CDT
System debugger multi-processor support
Custom libraries and Device drivers
Custom aware design
Integrated debug with HW/SW Cross-triggering and Debug
Software Profiling and Optimization

19. Resources for the Course
CEC Courses: An Introduction to Application Specific Programmable Logic Devices Using FPGAs with Embedded Processors in Your Designs Getting Started with Programmable Logic Programmable Logic: How do they do that? SoC FPGA Manufacturers Web Sites:

20. This Week’s Agenda
7/20/15 An Introduction to SoC FPGAs 7/21/15 Downloading, Installing and Running Design Software 7/22/15 A Simple Example Design 7/23/15 Targeting the Development Board 7/24/15 Processor and FPGA- the full flow