1. Lab11: Power Combiners & Dividers
Day 3
Lab11: Power Combiners & Dividers

2. Theme Day 1- Background Preparation
Maxwell Equations-Physical Interpretation & Application
Interconnects- Design, Mismatch, & Insertion Losses
GaAs Process- Pseudomorphic HEMTs, Inductors & MIM Capacitors
Process Introduction
Day 2- Power Amplifier, MMIC Design Example
DC Characterization- Biasing Decoupling, Biasing Techniques, Thermal Stability
Small Signal Characterization- Matching & Stability
Large Signal Characterization- Single Tone Analysis, Matching across Power
Load Pull
Day 3- Design Refining, Layout & Design Post Processing
Modulated Signal- QAM16 Input, Ptolemy & Circuit Co-simulations
Linearity- Two Tone Analysis, IP3, ACPR, & EVM
On-chip Power Combiners & Dividers
Layout & Tiling

3. Issues with Large Power Transistors
Admittance Smith Chart
Very Low Input Impedance of Power Transistor
Issues with Large Power Transistors
Drain
Source
Gate
Large Parasitic Capacitances

4. Wilkinson Power Dividers
λ/4
100 Ω
2-Way Wilkinson Divider
50 Ω
3-Way Wilkinson Divider
Ideal Wilkinson Divider
ADS Setup to simulate Wilkinson Divider

5. Wilkinson Divider Performance

6. Balanced Power Amplifier
100Ω
70.7Ω
Vdd
50Ω
Balanced Power Amplifier Component

7. Wilkinson Divider using Lumped Components
λ/4 L CX
π equivalent model for Quarter Wavelength long line
Lumped Component Model of Divider

8. Single Tone Simulation of Balanced PA

9. Single Tone Performance of Balanced PA

10. Lab11: Power Combiners & Dividers
Start Lab Exercise!