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Addressing Modes the addressing mode defines how data is accessed

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Presentation on theme: "Addressing Modes the addressing mode defines how data is accessed"— Presentation transcript:

1 Addressing Modes the addressing mode defines how data is accessed
↑ # of addressing modes → ↑ flexibility → easier to program ↑ # of addressing modes → ↑ complex machine code each operand has an addressing mode e.g. MOVE.B Num1,D0 ideally, every addressing mode would work with every instruction ≡ orthogonal instruction set effective address ≡ <ea> ≡ EA effective address indicates how the address of the operand is calculated all addressing modes with the exception of immediate have an effective address

2 Basic Addressing Modes
Immediate #<data> or Imm # (pound/hashtag) sign indicates that the item that follows is immediate data eg. #%1011, #$AF, #'The', #52*7, #NUM operand is a constant or a constant expression (evaluated at time of assembly) operand is in the instruction machine code <ea> = none instruction machine code operand

3 Basic Addressing Modes
Immediate #<data> or Imm e.g. MOVE.B #25,D0 e.g. ADDI.B #1,D2 e.g. MOVE.W #num1,A0 …. num1 DC.W 255 “quick” instructions, e.g. ADDQ, SUBQ, MOVEQ, use immediate data but with restricted range

4 Basic Addressing Modes
Register Direct (Register) Dn or An operand is in a general register registers <ea> = Rn e.g. MOVE.B #25,D0 e.g. ADDI.B #1,D2 operand Rn instruction machine code

5 Basic Addressing Modes
Direct (Memory Direct) (xxx).W or (xxx).L operand is a variable ± constant expression (evaluated at time of assembly) the address of the operand is part of the instruction <ea> = address e.g. MOVE.B D0,num1 … num1 DC.B $05 e.g. MOVE.B 25,D0 address instruction mcode operand memory

6 Direct (Memory Direct)
(optional) Direct (Memory Direct) (xxx).W or Abs.W absolute short address stored as 16 bits specified as $0 to $7FFF $8000 to $FFFF final address is sign extension of 16 bit address (xxx).L or Abs.L absolute long address stored as 32 bits difference in machine code as absolute short generates more compact machine code memory extremes have special uses (system area, I/O interfaces, ROM) $ 32K = 32 x 1024 $00 7FFF $FF 8000 32K $FF FFFF

7 e.g. shift a 16 bit variable left one bit; in place

8 eg. Divide an 8-bit variable into two 4-bit nibbles
eg. Divide an 8-bit variable into two 4-bit nibbles. Store the top nibble of the original into the low nibble of the top byte of the result and store the low nibble of the original into the low nibble of the low byte of the result.  “unpack” the number For example, if byte =$5F, the resulting word would be $050F.

9 Reading/Expectations
Endianness White Paper read pages 1-8 [pdf, 22p, Intel, November 15, 2004] Orthogonal instruction set [Wikipedia®] Expectations: you are able to write simple programs using the three addressing modes you can determine the addressing modes for any instruction (currently limited to the 3 addressing modes that you know) you can explain the concept of effective address and provide it for these and all future addressing modes


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