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Daniela Bortoletto, Amitava Roy, Carsten Rott, Gino Bolla
CSEM & Sintef Wafer Results April 26, 2000 Daniela Bortoletto, Amitava Roy, Carsten Rott, Gino Bolla Purdue University
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Sintef Wafer Results 2 Wafers (#9, #24) have been received
IV & CV measurements are underway on wafer #24 Pixels for BTeV have been measured
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Sintef-BTeV Pixels Early and inconsistent breakdown voltage
Depletion at around 150V
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Sintef-Purdue Diodes Cluster diodes breakdown at ~600V
Area = 1.75*1.75mm^2
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Status of Measurements of CSEM (Purdue Zurich PSI) Wafer
IV and CV measurements on Wafer I + II are completed Correlations between P-stop design and breakdown have been found Parts of Wafer II have been wire bonded
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Comparison (CSEM) Applying bias voltage from
n-side or p-side gives the same results
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Longterm measurement (CSEM)
An increase in leakage current is observed Leakage current stabilizes after several hours Bias voltage 300V (before breakdown)
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Differences between wafers (CSEM)
Breakdown voltage in agreement. Current per unit area differs.
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Current per unit area and wafer
Average current per unit area at 1.5*depl. Voltage CSEM Wafer nA/cm^2 CSEM Wafer nA/cm^2 Sintef Wafer nA/cm^2
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CSEM P-Stop designs Resistance D F G A,B,C - not metalized
D,E,F,G,H - metalized
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Wire bonded CSEM Wafer II
n-side is up p-side wire bonded
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Interpixel Measurements on CSEM Wafer (Pixel 20)
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Biasing the whole pixel array
Voltage at Pixel in Pixel array 20 on CSEM Wafer 20 it can be seen that the whole pixel array is biased
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Interpixel Measurements on CSEM Wafer
Test Structures on the CSEM wafer, needs to be wire bonded measuring interpixel capacitance and resistance
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Conclusions & Goals A correlation between P-stop design and breakdown has been found and can be fully understood soon Interpixel measurements needs to be done
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