1. ECE 486/586 Computer Architecture Introductions Instructor and You
Herbert G. Mayer, PSU
Status 1/1/2017

2. Syllabus Your PSU Instructor Goals of ECE 486/586 Extra Credit
Who Are You?
Expected Background
Structure of ECE 486/586
Read Handout 1

3. Your PSU Instructor
Instructor is a German immigrant to the USA, who worked in the US computer industry and academia
Moved to the USA, due to marriage with US citizen in Berlin
Became naturalized US citizen in 1995
MS EECS (Electrical Engineering and Computer Science) UCSD 1983; beautiful beach & campus!
PhD CS (Informatik, equivalent to Computer Science) Technical University Berlin 1995; awesome city, now united! Dissertation published as book at Springer Verlag© 1996
Professional focus at Intel on compiler optimization, HW validation, alias analysis, programming languages, VLIW, multiprocessing

4. Your PSU Instructor
PhD Thesis on automated MP code generation via alias analysis of source programs
Retired from Intel Corp. in 2011 after 24 years with that awesome microprocessor company
Implemented Intel Compilers for systolic array architecture 1980s
Manager of Intel CPU tuning lab 1990s for new CPUs
Manager of Intel CPU functi9nal validation in 2000s for new Intel processors
Teaching computer science since 1987 PSU
Teaching experience 2004 in Shanghai, at IIIST
Loved China and teaching in China, thus participated in our CCUT + PSU cooperation
Working at CCUT in Manchuria since 2014

5. Goals of ECE 486/586
ECE 486/586 is a course in computer system architecture and design
Key topics include advanced CPU design, including techniques to exploit parallelism, pipelining, dynamic instruction issue, superscalar, vector arch.
We discuss somewhat esoteric architectures e.g. Systolic Arrays
We discuss high-performance processor execution, memory and IO systems design
Introduce engineering issues with parallel computers
Survey current literature in computer architecture and of current advanced computer systems

6. Extra Credit
Extra Credit: is a way to improve your grade by up to a half grade, i.e. up to a maximum of 50 points
Extra Credit is granted for good ideas expressed in class, constructive questions and contributions in class, identifying errors in class material
Volunteers may present their HW 1 solution, or select topics in class, a few minutes each extra credit
Any error in class material, even the slightest typo – but only pointed out the first time– is worth some extra credit
Presenting smart homework solutions in class can deserves extra credit; you need to volunteer for such presentations proactively

7. Who are You?
Briefly, some students volunteer to articulate in class, explaining:
Your name
Your field of study, major, and current progress
Why do you take ECE 486/586
What is your expectation of this class?
What is your minimal goal for this class?
Which is your ideal learning goal?
Have you worked in the computer industry?
Which computer subjects are you interested in?
Anything else relevant to this course

8. Expected Background Know how to program in C or C++
Understand Computer architecture elements
Basic CPU operation, microprocessor or other
RISC, CISC, GPR architecture
Data cache and instruction cache
Some branch prediction, and why necessary for pipelined architecture

9. Structure of ECE 486/586
Week 1-5 only lectures, week 6 one lecture by TA
Every week you are assigned to read some computer architecture papers; see reading list
Last week students have option present summaries and assessments of key architecture papers
Presentation via PowerPoint or equivalent
Cache Simulator Project: Students implement a very simple L1 multi-way data cache simulator
Simulator reads memory access streams, generated by the load/store pattern of a matrix multiply app: your HW 1

10. Read Handout 1 Much technical reading throughout course
So start reading early
Follow the schedule of papers to be read
Read on-line information, specifically handout 1 in week 1, and work on homework 1 in week 1
OK to communicate with Herb via from day 1