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Progress Report 2014/05/23.

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Presentation on theme: "Progress Report 2014/05/23."— Presentation transcript:

1 Progress Report 2014/05/23

2 Different Applications
Run different applications on ODROID board and observe the loading and power reading. Type 1 big.LITTLE core board Applications including Video Game Mobile benchmarks

3 Video - .rmvb

4 Video - .mkv

5 Observations The CPU loadings vary from one media player to the other on playing the same video. A media player results in different CPU loading while playing videos with different format.

6 Game - Angry Bird

7 Observation There are many “peaks of loading”.
Probably caused by user behaviors.

8 Benchmark - Antutu

9 Benchmark - Quadrant

10 Benchmark - Vellamo

11 Short Summary It is difficult to predict or estimate the behavior of each task in the system during runtime.

12 Scheduler in Hypervisor
Instead of focusing on scheduling tasks to (virtual) cores in one OS, we can consider scheduling virtual cores to physical cores from the hypervisor perspective.

13 Problem Given a set of VMs, each VM has several virtual cores with different frequencies. How to schedule these virtual cores to a set of big and little physical cores, such that each virtual core is can have sufficient computing cycles in a fixed time interval.

14 Core Model Need to build the Loading-to-Power model of big and little core. Decide which is better, “separate” or “consolidate” Run bzip2 and busyAdding using one big or little core, and measure the power consumption. Use cpulimit to cap the loading of task.

15 Result – bzip2

16 Result - busyAdding

17 Short Summary The power consumption is almost linear to the loading.
Even the loading is the same, the power consumption is slightly higher while executing bzip2 than busyAdding. Probably the power consumed by cache or other components on core.

18 Current Idea “Big vCPUs to big ARM cores, little vCPUs to little ARM cores”. If big ARM cores can not provide enough CPU resource, then consider schedule big vCPUs on both big and little ARM cores. Note that we can “slice” a core.


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