1. EMT362: Microelectronic Fabrication Thin Gate Oxide – Growth &
Ramzan Mat Ayub; SATF 2005
EMT362: Microelectronic Fabrication
Thin Gate Oxide – Growth &
Reliability
Ramzan Mat Ayub
School of Microelectronic Engineering

2. Ramzan Mat Ayub; SATF 2005
Lecture Objectives
Understand the importance and requirement of thin gate oxide
Able to describe the tecnique to grow high quality thin oxides
Understand the nature of Mode-A,B &C of breakdown failure
Able to calculate the oxide strength, τBD and QBD

3. Gate Oxide L GATE Gate Oxide ID P-well n+ n+
Ramzan Mat Ayub; SATF 2005
Gate Oxide L
GATE
Gate Oxide n+ n+ ID
P-well

4. Gate Oxide Requirements
Ramzan Mat Ayub; SATF 2005
Gate Oxide Requirements
Possible to grow thin oxide precisely and uniformly across the wafer
Adequate reliability characteristics under operating conditions in terms
of strength (Breakdown Voltage), Reliability of operation over specified
time (τBD, QBD) and resistance to hot-carrier degradation)

5. Desired Gate Oxide Characteristics
Ramzan Mat Ayub; SATF 2005
Desired Gate Oxide Characteristics
The thickness closely match the specification in MOSFET design
Uniform across the wafer, from wafer to wafer, run to run.
Small interface charge
High dielectric strength
Long lifetime under normal operating conditions
High resistance to hot-carrier damage

6. Technology of Thin Oxide Growth
Ramzan Mat Ayub; SATF 2005
Technology of Thin Oxide Growth
Oxidation furnace
Vertical furnace is more favourable compared to horizontal.
3 reasons
Wafer/wafer holders make no contact with oxidation tube during
loading, growth and unloading (fewer particles generated).
Lighter boat material can be used, as a result, better heat and gas
distributions (result in better oxide uniformity).
Precise control of wafer to wafer spacing.

7. Technology of Thin Oxide Growth
Ramzan Mat Ayub; SATF 2005
Technology of Thin Oxide Growth
2. Control of Growth Rates
Slow growth rates required to reproducibly grow thin oxides with
precise thickness.
Grow in dry O2 at atmospheric pressure at lower temperatures
( C).
Growth at reduced total pressure, or reduced O2 partial pressure

8. Technology of Thin Oxide Growth
Ramzan Mat Ayub; SATF 2005
Technology of Thin Oxide Growth
Typical Thin Gate Oxide Process
Carried out in vertical furnace
Prior to oxide growth;
Grow and strip sacrificial oxide (to remove defect in silicon layer)
Cleaning procedure (normally generic of RCA cleaning)
Loaded by robotic wafer handling at specific insertion rates ~ 15 cm
per minute for 150mm wafer, 10cm per minute for 200mm wafer.
Furnace temperature ~ 650 – 700C.
Furnace temperature is ramped up to the growth temperature. During
temperature ramp up, N2 or Ar is purged to prevent unwanted growth.
Temperature stabilization around 5 min before O2 is released.

9. Technology of Thin Oxide Growth
Ramzan Mat Ayub; SATF 2005
Technology of Thin Oxide Growth
Typical Gate Oxide Process
Dry oxidation at atmospheric pressure at temperature ~ C.
Some companies use dry/wet/dry to control the thermal budget. Others
use HCl, TCA , DCE as chlorine source.
Wafers subjected to Post Oxidation Annealing (POA) in N2 at + ~100C.
The purpose is to minimize the interface trap density by neutralizing
the dangling bond of Si with H atoms. This will improve the τBD and QBD.
Furnace temperature is ramped down, and wafer is unloaded at certain
rate.

10. Gate Oxide Characterizations
Ramzan Mat Ayub; SATF 2005
Gate Oxide Characterizations
Gate oxide Strength
Breakdown voltage, then calculate the breakdown electric field.
Gate Oxide Reliability
τBD – time to breakdown
QBD – charge to breakdown

11. Ramzan Mat Ayub; SATF 2005
Gate Oxide Strength
Definition – The maximum electric field strength that can be applied
to the oxide before it breaks down. Unit MV/cm.
Test procedure – Ramped Voltage Test using MOS capacitor

12. Ramp voltage between T1 and T2, measure current
Ramzan Mat Ayub; SATF 2005 T1 V
GATE
Gate Oxide
substrate t Ig T2
Ramp voltage between T1 and T2, measure current
Take the voltage at the voltage drop as the breakdown voltage (VBD)
Calculate the oxide strength by VBD / oxide thickness
VBD V

13. Ramzan Mat Ayub; SATF 2005
Example
Thin oxide of 500A is stressed under voltage ramp test until it breaks at
8 V. Calculate the oxide strength.
Oxide strength = Breakdown voltage / oxide thickness
= 8 V / 500e-8 cm
= 1.6e6 V/cm
= 1.6 MV / cm

14. Mode of Breakdown Failure
Ramzan Mat Ayub; SATF 2005
Mode of Breakdown Failure
A histogram is usually used to plot the results of the ramped-voltage tests
(oxide strength) of a group of oxide samples (normally up to 1000 capacitor
tested to characterized certain oxidation process recipe)
Breakdown
Frequency
Mode-B (2-6 MV/cm)
Mode-C (8-12 MV/cm)
Mode-A (<1 MV/cm) 5 10
Breakdown Field, MV/cm

15. Mode-A Fail instantly upon the application of a small gate bias.
Ramzan Mat Ayub; SATF 2005
Mode-A
Fail instantly upon the application of a small gate bias.
Its believed that this oxide may experienced a gross defect such as
pinholes and may already be shorted before the application of low
strength field.

16. Mode-B Fail at electric field of intermediate strength (2-6 MV/cm)
Ramzan Mat Ayub; SATF 2005
Mode-B
Fail at electric field of intermediate strength (2-6 MV/cm)
Contain weak spots that do not produce instant shorting, but may give rise
to early failures of ICs under normal operating conditions.
Majority of oxide breakdown failure in sub-micron CMOS fall under this
category. Mostly due to the defects exist in the oxide.
Defects include;
Sodium contamination – originated from W furnace filamen, chemicals
Metal contamination – from substrate, other processes
Surface roughness at Si-SiO2 interface from etching or cleaning
procedures – promote localize weak spot
Non-uniformity of oxide growth
Crystalline defect – defect originated during crystal growth

17. Mode-C Can withstand the highest electric fields (8-12 MV/cm)
Ramzan Mat Ayub; SATF 2005
Mode-C
Can withstand the highest electric fields (8-12 MV/cm)
Failure mechanism always referred as intrinsic failure.
Generally assumed as defect-free oxide.
Several models proposed to explain the intrinsic breakdown
Holes generation and trapping model.
Electrons are injected into the conduction band of oxide by FN
tunneling. In the oxide, these electrons are accelerated towards
the gate, and generate electron-hole pair in the oxide. These
generated holes are trapped at the localized areas and in return trap
positive oxide charge. This will increase the positive charge at
certain point in the oxide, causing the tunneling current density
to increase there up to critical point where the breakdown occurs.
Wolters Electron Lattice-Damage Model

18. Gate Oxide Reliability
Ramzan Mat Ayub; SATF 2005
Gate Oxide Reliability
Gate oxide strength is not directly relevant to the normal device
operation, since what is really needed is how long the thin oxide will
survive at lower field strength.
The measurement of oxide performance at lower electric field is
called Time-Dependent Dielectric Breakdown (TDDB).
Time to Breakdown under Constant-Voltage Stressing (τBD)
Time to Breakdown under Constant-Current Stressing (τBD)
Charge to Breakdown (QBD)

19. Time to Breakdown under Constant-Voltage Stressing
Ramzan Mat Ayub; SATF 2005
Time to Breakdown under Constant-Voltage Stressing
Electric field in the oxide is held constant (voltage is held constant)
during the stress test. The length of time, τBD elapsed until breakdown
occurs is then measured.

20. Time to Breakdown under Constant-Current Stressing
Ramzan Mat Ayub; SATF 2005
Time to Breakdown under Constant-Current Stressing
Current is injected into the oxide by Fowler- Nordheim tunneling, and
this value Iinj is held constant. Voltage and time are recorded until
breakdown occurs.

21. Charge to Breakdown In a constant current test; QBD = Jinj . τBD
Ramzan Mat Ayub; SATF 2005
Charge to Breakdown
In a constant current test;
QBD = Jinj . τBD
In a constant voltage test;

22. Emperical Model to Estimate Oxide Reliability
Ramzan Mat Ayub; SATF 2005
Emperical Model to Estimate Oxide Reliability
Applicable to Mode-B and Mode-C Failures
1. QBD for intrinsic oxide is approximately constant for small FN tunneling
current.
2. Qp (hole charge to breakdown) also constant.
Qp = JgατBD
Where at 300C
sec
G=350 MV/cm

23. Ramzan Mat Ayub; SATF 2005
Example
Calculate the time-to-breakdown, τBD at 300K of 8nm defect free gate
oxide, use in CMOS technology with Vcc 5.0V.
τBD (300K)= 1e-11 (sec) exp 350e6 . Tox / Vox
= 1e-11 . exp 350e6 . 8e-7 / 5.0
= 2 e 13 sec

24. Ramzan Mat Ayub; SATF 2005
Example
Calculate the minimum thickness of a defect free oxide that could be
used in a MOSFET that is to operate at 5.5V for 10 years at 150 C (425K)
w/out suffering oxide breakdown. Given G(425K)= 283 MV/cm and
Τ0 (425K)=0.75e-11 sec.
τBD for 10 years ~ 3e8 sec
tox min = 88 Å