1. Input/Output DMA DMA receives I/O ready Cycle stealing
Wait for the CPU to request bus
Put CPU to sleep
Perform 1-word data transfer
Wake CPU up
CPU proceeds with bus operation
if more data loop
Trigger CPU Interrupt
Isolated vs. Memory mapped
(see von Neumann vs
Harvard architectures)
Interrupt from I/O
CPU receives I/O ready
Dedicated Copy
Perform 1-word data transfer
if more data loop

2. Interrupts

3. Why study µP?
C++ program:
NIBBLE a,b,s;
a=5;
b=8;
s=a+b; ??

4. Why study µP? C++ program: NIBBLE a,b,s; a=5; b=8; s=a+b;
Compile -> object file
Link -> executable “binary” file
OS -> load/launch executable
CPU -> executes instructions
ALU -> performs addition (micro-operation)

5. Why study µP?
C++ program:
NIBBLE s;
cout<<s; ?? 13

6. Why study µP? C++ program: NIBBLE s; cout<<s; 13
s-> bitmap -> screen buffer
Video Interrupt:
screen buffer->DAC ->CRT 13

7. Where are the µP? Industrial controllers Consumer goods PC/PDA’s
Embedded systems
Microcontrollers
SoC
Reference
Diagrams from William Stallings, “Computer Architecture and Organization”,
5th edition (also see 3rd and 4th editions)
Chapters:
2: Computer Evolution and Performance
3: System Buses
11: CPU Structure and Function
14: Control Unit Operation
9/10: Instruction Sets