1. Sequential Circuit Design
Section 5-5

2. State Machines Design Procedure
Specification- obtain (produce) problem description
Formulation - Obtain a state diagram or state table
State Assignment - Assign binary codes to the states
Flip-Flop Input Equation Determination
Select flip-flop types
Derive equations of inputs to the flip-flops from next state entries in the table

3. State Machines Design Procedure (continued)
Output Equation Determination - Derive output equations from output entries in the table
Optimization - Optimize the equations
Technology Mapping –
Find circuit from equations
Map to flip-flops and gate technology
Verification - Verify correctness of final design

4. Specification- obtain (produce) problem description
State Machines Design Procedure; Example: Sequence Recognizer Specification
Example 5-3 (pp )
Specification- obtain (produce) problem description
Circuit has input, X, and output, Z
Recognizes sequence 1101 on X
Specifically, if X has been 110 and next bit is 1, make Z high

5. Understand the problem specifications: Sequence Recognizer
Sequential machine recognizes the sequence 1101
The sequence contains 1101
Sequential machine must remember that the first two one's have occurred as it receives another bit.

6. Understand the problem specifications: Sequence Recognizer II
Also, the sequence contains as both an
initial subsequence
final subsequence
The sequence 1101 must be recognized each time it occurs in the input sequence.

7. Formulation - Obtain a state diagram or state table
State Machines Design Procedure; Example: Sequence Recognizer Formulation
Formulation - Obtain a state diagram or state table
States remember past history
Must remember we’ve seen 11 as machine receives another bit
Must remember we’ve seen 110 when another bit comes along
There is more to remember….
Tell me one necessary state

8. Beginning State
System starts in some state, A A

9. First 1 If 1 appears, move to next state B
B recognizes (remembers) that 1 was received
Input / Output

10. Second 1
New state, C
C remembers that 11 was received

11. Next a 0 If 110 has been received, go to D
D remembers that 110 was received
Next 1 will generate a 1 on output Z

12. What else? What happens to arrow on right? Remember we’ve just seen 01
Must go to some state.
Where?
Remember we’ve just seen 01

13. You must cover every possibility
You must have every possibility out of every state
In this case, just two possibilities: X = 0 or 1
We fill in other cases on the white board

14. Fill in Remembers that {a single “1” sequence occurred }
Remembers that a {“110” sequence occurred}
Remembers that {a “11” sequence occurred }

15. Answer
Remembers: No proper sub-sequence of the sequence 1101 has occurred

16. Recognize 1101 (continued)
1/1 A B
1/0 C D
0/0
The states have the following abstract meanings:
A: No proper sub-sequence of the sequence has occurred.
B: The sub-sequence 1 has occurred.
C: The sub-sequence 11 has occurred.

17. Example: Recognize 1101 (continued I)
1/1 A B
1/0 C D
0/0
D: The sub-sequence 110 has occurred.
The 1/1 on the arc from D to B means that the last 1 has occurred and thus, the sequence is recognized.

18. Find State Table

19. 3. State Assignment
Each of the m states must be assigned a unique binary code
Sequence Recognizer: m=4 (A, B, C, D)
Minimum number of bits required is n such that n ≥ log2 m where x is the smallest integer ≥ x
In general, there can be 2n - m unused states

20. State Assignment for the Sequence Recognizer: Example 5-5 p. 239
Present
State
Next State
x=0 x=1
Output
x=0 x=1 A
A B B
A C C
D C D
# of needed codes = m = 4;
How may assignments of codes are possible with 2 bits?
4  3  2  1 = 24

21. State Assignment – (continued)
Let us choose the code assignment :
A = 0 0 , B = 0 1 , C = 1 1 , D = 1 0
The resulting coded state table:
Present State
Next State
x = 0 x = 1
Output
0 0
0 1
1 1
1 0 1

22. 4. Find Flip-Flop Input and Output Equations
Assume D flip-flops, outputs labeled A, B
Obtain K-maps for DA, DB, and Z: B A X 1 DA B A X 1 DB B A X 1 Z

23. 6. Optimization: Performing two-level optimization:
DA = AB + XB DB = X Z = XAB DA DB Z B A X 1 B A X 1 B A X 1

24. 7. Map Technology DA = AB + XB DB = X Z = XAB Initial Circuit: A D Z B
Clock D C R B Z A X
Reset

25. Mapped Circuit - Final Result
Library:
D Flip-flops with Reset
NAND gates with up to 4 inputs and inverters
Clock D C R B Z A X
Reset