1. CPSC 121: Models of Computation 2016W2
Building & Designing Sequential Circuits
Steve Wolfman, based on notes by Patrice Belleville and others
TODO (future terms): update term
                           This work is licensed under a Creative Commons Attribution 3.0 Unported License.

2. Outline Prereqs, Learning Goals, and Quiz Notes
Problems and Discussion
A Pushbutton Light Switch
Memory and Events: D Latches & Flip-Flops
General Implementation of DFAs (with a more complex DFA as an example)
How Powerful are DFAs?
Next Lecture Notes

3. Learning Goals: Pre-Class
We are mostly departing from the readings to talk about a new kind of circuit on our way to a full computer: sequential circuits.
The pre-class goals are to be able to:
Trace the operation of a deterministic finite-state automaton (represented as a diagram) on an input, including indicating whether the DFA accepts or rejects the input.
Deduce the language accepted by a simple DFA after working through multiple example inputs.
TODO (2011W1): make difference between combo and seq’l circuitry a pre-class learning goal, assuming someday we have readings on this!

4. Learning Goals: In-Class
By the end of this unit, you should be able to:
Translate a DFA to a corresponding sequential circuit, but with a “hole” in it for the circuitry describing the DFA’s transitions.
Describe the contents of that “hole” as a combinational circuitry problem (and therefore solve it, just like you do other combinational circuitry problems!).
Explain how and why each part of the resulting circuit works.
Discuss point of learning goals.

5. Where We Are in The Big Stories
Theory
Hardware
How do we model computational systems? Now: With our powerful modelling language (pred logic), we can prove things like universality of NOR gates for combinational circuits. Our new model (DFAs) are sort of full computers.
How do we build devices to compute? Now: Learning to build a new kind of circuit with memory that will be the key new feature we need to build full- blown computers! (Something you’ve seen in lab from a new angle.)

6. Outline Prereqs, Learning Goals, and Quiz Notes
Problems and Discussion
A Pushbutton Light Switch
Memory and Events: D Latches & Flip-Flops
General Implementation of DFAs (with a more complex DFA as an example)
How Powerful are DFAs?
Next Lecture Notes

7. Problem: Push-Button Light Switch
Problem: Design a circuit to control a light so that the light changes state any time its “push-button” switch is pressed.
(Like the light switches in Dempster: Press and release, and the light changes state. Press and release again, and it changes again.) ?
[2012S2] Great response to open-ended Q: So now the question becomes, how to use a combinational digital logic circuit in a way that makes the light change states when the button , is pushed, if the button can only send one input. It can't because no matter what combinational circuit you use, the output is constant for a given input. What a combinational digital logic circuit , lacks is the ability to remember the previous state it was in and use that as a factor in changing the state of the light. Memory would allow the circuit to use the previous output as a second input. , I also think that there has to be a way to tell the circuit that 'pushing and releasing' the button is one input, in the case that the circuit may take the two for different values.

8. A Light Switch “DFA” ? pressed pressed
light off
light on
pressed
This Deterministic Finite Automaton (DFA) isn’t really about accepting/rejecting; its current state is the state of the light.

9. Problem: Light Switch ?
Problem: Design a circuit to control a light so that the light changes state any time its “push-button” switch is pressed.
Identifying inputs/outputs: consider these possible inputs and outputs:
Input: the button was pressed or
the button is down
Output: the light is shining or
the light changed states
Which are most useful for this problem?
pressed and shining
pressed and changed
down and shining
down and changed
None of these
TODO (future terms): keep this and next slide in sync w/lecture 2a?
[2011W1] REPEAT of the Lecture 2 question on light switches, but this time it’s the EVENT of button press that we care about AND (both as input and as output) the state of the light (being on or off).

10. COMPARE TO: Lecture 2’s Light Switch?
COMPARE TO: Lecture 2’s Light Switch
Problem: Design a circuit to control a light so that the light changes state any time its switch is flipped.
Identifying inputs/outputs: consider these possible inputs and outputs:
Input: the switch flipped or
the switch is up
Output: the light is shining or
the light changed states
Which are most useful for this problem?
flipped and shining
flipped and changed
up and shining
up and changed
None of these
Emphasize that last time we wanted the equivalent of “down” as the input.
This time, that’s not useful to us. We don’t want to force the person to hold the button down!

11. Outline Prereqs, Learning Goals, and !Quiz Notes
Problems and Discussion
A Pushbutton Light Switch
Memory and Events: D Latches & Flip-Flops
General Implementation of DFAs (with a more complex DFA as an example)
How Powerful are DFAs?
Next Lecture Notes

12. Departures from Combinational Circuits
MEMORY: We need to “remember” the light’s state. EVENTS: We need to act on a button push rather than in response to an input value.

13. Problem: How Do We Remember?
We want a circuit that:
Sometimes… remembers its current state.
Other times… loads a new state to remember.
Sounds like a choice.
What circuit element do we have for modelling choices?

14. Worked Problem: “Muxy Memory”
How do we use a mux to store a bit of memory? We choose to remember on a control value of 0 and to load a new state on a 1.
???
[2011W1] We have the logisim diagram. Replace? Probably not.
output
new data 1
control
We use “0” and “1” because that’s how MUXes are usually labelled.

15. Worked Problem: Muxy Memory
How do we use a mux to store a bit of memory? We choose to remember on a control value of 0 and to load a new state on a 1.
old output (Q’)
output (Q)
new data (D) 1
control (G)
This violates our basic combinational constraint: no cycles.

16. Truth Table for “Muxy Memory”
Fill in the MM’s truth table:
a. b. c. d. e. G D Q' 1 Q 1 Q 1 Q 1 X Q 1
None of these

17. Worked Problem: Truth Table for “Muxy Memory”
Worked Problem: Write a truth table for the MM: G D Q' Q 1
Like a “normal” mux table, but what happens when Q'  Q?

18. Worked Problem: Truth Table for “Muxy Memory”
Worked Problem: Write a truth table for the MM: G D Q' Q 1
Q' “takes on” Q’s value at the “next step”.

19. “D Latch” Symbol + Semantics
We call a “muxy memory” a “D latch”. When G is 0, the latch maintains its memory. When G is 1, the latch loads a new value from D.
old output (Q’)
Why is it called a D latch?
“Latch” b/c it “latches onto”/grabs an input?????
“D” for “data”????
Beats me 
output (Q)
new data (D) 1
control (G)

20. D Latch Symbol + Semantics
When G is 0, the latch maintains its memory. When G is 1, the latch loads a new value from D.
old output (Q’)
output (Q)
new data (D) 1
control (G)

21. D Latch Symbol + Semantics
When G is 0, the latch maintains its memory. When G is 1, the latch loads a new value from D. D G Q
new data (D)
output (Q)
control (G)

22. Hold On!!
Don’t
Panic!
Why does the D Latch have two inputs and one output when the mux inside has THREE inputs and one output?
The D Latch is broken as is; it should have three inputs.
A circuit can always ignore one of its inputs.
One of the inputs is always true.
One of the inputs is always false.
None of these (but the D Latch is not broken as is).

23. Using the D Latch for Circuits with Memory
Problem: What goes in the cloud? What do we send into G? D G Q
Combinational Circuit to calculate next state ??
input
We assume we just want Q as the output.

24. Using the D Latch for Our Light Switch
Problem: What do we send into G? D G Q
current light state ??
no (0 bit) input
output
T if the button is down, F if it’s up.
T if the button is up, F if it’s down.
Neither of these.

25. A Timing Problem: We Need EVENTS!
Problem: What do we send into G? D G Q
current light state
“pulse” when button is pressed
output
button pressed
As long as the button is down, D flows to Q flows through the NOT gate and back to D... which is bad!

26. A Timing Problem, Metaphor (from MIT 6.004, Fall 2002)
What’s wrong with this tollbooth?
P.S. Call this a “bar”, not a “gate”, or we’ll tie ourselves in (k)nots.

27. A Timing Solution, Metaphor (from MIT 6.004, Fall 2002)
Is this one OK?

28. “pulse” when button is pressed
A Timing Problem
Problem: What do we send into G? D G Q
current light state
“pulse” when button is pressed
output
button pressed
As long as the button is down, D flows to Q flows through the NOT gate and back to D... which is bad!

29. A Timing Solution (Almost)D G Q R D G Q
Never raise both “bars” at the same time.
output
button pressed

30. A Timing Solution L R D G Q D G Q ?? output
The two latches are never enabled at the same time (except for the moment needed for the NOT gate on the left to compute, which is so short that no “cars” get through).

31. A Timing Solution L R D G Q D G Q button press signal output
button pressed

32. Button/Clock is LO (unpressed)1 L D G Q 1 R D G Q 1
Also built in Logisim, but goes “too fast”; need the propagation steps. (Could build custom inverters and D latches with built-in clock-cycle delay, I suppose.)
output LO
We’re assuming the circuit has been set up and is “running normally”. Right now, the light is off (i.e., the output of the right latch is 0).

33. Button goes HI (is pressed)1 L D G Q 1 R D G Q 1
output HI 1
This stuff is processing a new signal.

34. Propagating signal.. left NOT, right latch1 L D G Q 1 R D G Q 1
output HI 1
This stuff is processing a new signal.

35. Propagating signal.. right NOT (steady state)L D G Q 1 R D G Q 1
output HI 1
Why doesn’t the left latch update?
Its D input is 0.
Its G input is 0.
Its Q output is 1.
It should update!

36. Button goes LO (released)L D G Q 1 R D G Q 1
output LO
This stuff is processing a new signal.

37. Propagating signal.. left NOTL D G Q 1 R D G Q 1 1
output LO
This stuff is processing a new signal.

38. Propagating signal.. left latch (steady state)L D G Q R D G Q 1 1
output LO
And, we’re done with one cycle. How does this compare to our initial state?

39. Master/Slave D Flip-Flop Symbol + Semantics
When CLK goes from 0 (low) to 1 (high), the flip-flop loads a new value from D. Otherwise, it maintains its current value.
new data (D) D G Q D G Q
output (Q)
control or “clock” signal (CLK)

40. Master/Slave D Flip-Flop Symbol + Semantics
When CLK goes from 0 (low) to 1 (high), the flip-flop loads a new value from D. Otherwise, it maintains its current value.
new data (D) D G Q D G Q
output (Q)
control or “clock” signal (CLK)

41. Master/Slave D Flip-Flop Symbol + Semantics
When CLK goes from 0 (low) to 1 (high), the flip-flop loads a new value from D. Otherwise, it maintains its current value.
new data (D) D G Q D G Q
output (Q)
control or “clock” signal (CLK)

42. Master/Slave D Flip-Flop Symbol + Semantics
When CLK goes from 0 (low) to 1 (high), the flip-flop loads a new value from D. Otherwise, it maintains its current value. D Q
clock signal
output
new data
We rearranged the clock and D inputs and the output to match Logisim. Below we use a slightly different looking flip-flop.

43. Why Abstract?
Logisim (and real circuits) have lots of flip-flops that all behave very similarly:
D flip-flops,
T flip-flops,
J-K flip-flops,
and S-R flip-flops.
They have slightly different implementations… and one could imagine brilliant new designs that are radically different inside.
Abstraction allows us to build a good design at a high-level without worrying about the details.
Plus… it means you only need to learn about D flip-flops’ guts. The others are similar enough so we can just take the abstraction for granted.

44. Outline Prereqs, Learning Goals, and !Quiz Notes
Problems and Discussion
A Pushbutton Light Switch
Memory and Events: D Latches & Flip-Flops
General Implementation of DFAs (with a more complex DFA as an example)
How Powerful are DFAs?
Next Lecture Notes

45. How Do Computers Execute Programs?
High-level languages (Java/Racket) are translated into low-level machine language
A machine language program is a list of instructions in a representation scheme close to “plain” binary (e.g., 4 bits for the type of instruction, 4 bits for what part of the computer the result goes to, etc.)
Each instruction has a (barely) human-readable version
After it’s done with an instruction, the computer (usually) executes the next instruction in the list

46. Simplified Example (sum of 1..n)
is n = 0?
if the answer was yes, go to (7)
sum  sum + n
n  n - 1
go to (2)
halt
If the computer executed all instructions in order, there’d be no loops or recursion!
Fortunately, “branch” instructions (like (3)) tell the computer to go elsewhere.

47. Simplified Example, Complicated Execution
sum  0
is n = 0?
if the answer was yes, go to (7)
sum  sum + n
n  n - 1
go to (2)
halt
To run faster, the computer starts executing one instruction even before it finishes the last.
But then what does it do with (3)? Does it execute (4) or (7)?

48. Branch Prediction Machine
To pre-execute a “branch”, the computer guesses which instruction comes next. Here’s one reasonable guess: If the last branch was “taken” (like going to (7) from (3)), take the next. If it was “not taken” (like going to (4) from (3)), don’t take the next.
Why? In recursion, how often do we hit the base case vs. the recursive case?

49. Implementing the Branch Predictor (First Pass)
Here’s the corresponding DFA. (Instead of accept/reject, we care about the current state.)
taken  the last branch was taken
not taken  the last branch was not taken
yes  we predict the next branch will be taken
no  we predict the next branch will be not taken
not taken
taken
taken
yes no
not taken
Experiments show it generally works well to add “inertia” so that it takes two “wrong guesses” to change the prediction…

50. Implementing the Branch Predictor (Final Version)
Here’s a version that takes two wrong guesses in a row to admit it’s wrong: Can we build a branch prediction circuit?
taken
taken
taken
YES!
taken
no?
not taken
not taken
TODO: clicker Q on what state it’s in after some inputs.
yes?
not taken
NO!
not taken

51. Abstract Template for a DFA Circuit
Each time the clock “ticks” move from one state to the next.
store current state
compute next state
clock
input

52. Template for a DFA Circuit
Each time the clock “ticks” move from one state to the next. D Q
Combinational circuit to calculate next state/output
CLK
input
Each of these lines (except the clock) may carry multiple bits; the D flip-flop may be several flip-flops to store several bits.

53. How to Implement a DFA: Slightly Harder
Number the states and figure out b: the number of bits needed to store the state number.
Lay out b D flip-flops. Together, their memory is the state as a binary number.
Build a combinational circuit that determines the next state given the input and the current state.
Use the next state as the new state of the flip-flops.

54. How to Implement a DFA: Slightly Easier MUX Solution
Number the states and figure out b: the number of bits needed to store the state number.
Lay out b D flip-flops. Together, their memory is the state as a binary number.
For each state, build a combinational circuit that determines the next state given the input.
Send the next states into a MUX with the current state as the control signal: only the appropriate next state gets used!
Use the MUX’s output as the new state of the flip-flops.
With a separate circuit for each state, they’re often very simple!

55. Implementing the Predictor Step 1
taken
taken
taken
YES! 3
taken
no? 1
not taken
not taken
yes? 2
not taken
NO! 0
not taken
What is b (the number of 1-bit flip-flops needed to represent the state)?
0, no memory needed 1 2 3
None of these
As always, we use numbers to represent the inputs:
taken = 1 not taken = 0

56. Just Truth Tables... Reminder: not taken = 0 taken = 1
YES! 3
yes? 2
no? 1
NO! 0
not taken
taken
Reminder: not taken = 0
taken = 1
Current State
input
New state 1
What’s in this row?
0 0
0 1
1 0
1 1
None of these.

57. Just Truth Tables... Reminder: not taken = 0 taken = 1 Current State
YES! 3
yes? 2
no? 1
NO! 0
not taken
taken
Reminder: not taken = 0
taken = 1
Current State
input
New state 1

58. Implementing the Predictor: Step 3
We always use this pattern. In this case, we need two flip-flops. D Q D Q
Combinational circuit to calculate next state/output
CLK
input
Let’s switch to Logisim schematics...

59. Implementing the Predictor: Step 3Q D Q ??
CLK
sleft
input
???
sright

60. Implementing the Predictor: Step 3
sleft
???
sright
input

61. Implementing the Predictor: Step 5 (easier than 4!)
sleft
The MUX “trick” here is much like in the ALU from lab!
sright
EMPHASIZE that the labels on the mux inputs are NOT input values; they’re just telling us which state’s new value feeds into that wire.
input

62. Implementing the Predictor: Step 4
sleft
sright
[2011W1] TODO: consider moving the question elsewhere to uncover input pin? (On this AND subsequent slides.)
In state number 0, what should be the new value of sleft? Hint: look at the DFA, not at the circuit!
input
~input 1
None of these.
input

63. Implementing the Predictor: Step 4
sleft
sright
In state number 1, what’s the new value of sleft?
input
~input 1
None of these.
input

64. Implementing the Predictor: Step 4
sleft
sright
In state number 2, what’s the new value of sleft?
input
~input 1
None of these.
input

65. Implementing the Predictor: Step 4
sleft
sright
In state number 3, what’s the new value of sleft?
input
~input 1
None of these.
input

66. Just Truth Tables...
sleft
sright
input
sleft'
sright' 1
input

67. Implementing the Predictor: Step 4
sleft
sright
input

68. Implementing the Predictor: Step 4
In state number 0, what’s the new value of sright?
input
~input 1
None of these.
sright
input

69. Implementing the Predictor: Step 4
sleft
sright
TADA!!
input

70. You can often simplify, but that’s not the point.
sleft
sright
input

71. Just for Fun: Renaming to Make a Pattern Clearer...
YES! 3
yes? 2
no? 1
NO! 0
not taken
taken
pred
last
input
pred'
last' 1

72. Outline Prereqs, Learning Goals, and !Quiz Notes
Problems and Discussion
A Pushbutton Light Switch
Memory and Events: D Latches & Flip-Flops
General Implementation of DFAs (with a more complex DFA as an example)
How Powerful are DFAs?
Next Lecture Notes

73. Steps to Build a Powerful Machine
Number the states and figure out b: the number of bits needed to store the state number.
Lay out b D flip-flops. Together, their memory is the state as a binary number.
For each state, build a combinational circuit that determines the next state given the input.
Send the next states into a MUX with the current state as the control signal: only the appropriate next state gets used!
Use the MUX’s output as the new state of the flip-flops.
With a separate circuit for each state, they’re often very simple!

74. How Powerful Is a DFA?
DFAs can model situations with a finite amount of memory, finite set of possible inputs, and particular pattern to update the memory given the inputs.
How does a DFA compare to a modern computer?
Modern computer is more powerful.
DFA is more powerful.
They’re the same.

75. Where We’ll Go From Here...
We’ll come back to DFAs again later in lecture. In lab you have been and will continue to explore what you can do once you have memory and events. And, before long, how you combine these into a working computer! Also in lab, you’ll work with a widely used representation equivalent to DFAs: regular expressions.

76. Outline Prereqs, Learning Goals, and !Quiz Notes
Problems and Discussion
A Pushbutton Light Switch
Memory and Events: D Latches & Flip-Flops
General Implementation of DFAs (with a more complex DFA as an example)
How Powerful are DFAs?
Next Lecture Notes

77. Learning Goals: In-Class
By the end of this unit, you should be able to:
Translate a DFA to a corresponding sequential circuit, but with a “hole” in it for the circuitry describing the DFA’s transitions.
Describe the contents of that “hole” as a combinational circuitry problem (and therefore solve it, just like you do other combinational circuitry problems!).
Explain how and why each part of the resulting circuit works.
Discuss point of learning goals.

78. Next Lecture Learning Goals: Pre-Class
By the start of class, you should be able to:
Convert sequences to and from explicit formulas that describe the sequence.
Convert sums to and from summation/”sigma” notation.
Convert products to and from product/”pi” notation.
Manipulate formulas in summation/product notation by adjusting their bounds, merging or splitting summations/products, and factoring out values.

79. Next Lecture Prerequisites
See the Mathematical Induction Textbook Sections at the bottom of the “Readings and Equipment” page. Complete the open-book, untimed quiz on Vista that’s due before the next class.
TODO: double-check that the link still works (but it’s tied to “current”, not to a particular term)

80. (on your own or if we have time)
More problems to solve...
(on your own or if we have time)

81. Problem: Traffic Light
Problem: Design a DFA with outputs to control a set of traffic lights.

82. Problem: Traffic Light
Problem: Design a DFA with outputs to control a set of traffic lights. Thought: try allowing an output that sets a timer which in turn causes an input like our “button press” when it goes off. Variants to try: - Pedestrian cross-walks - Turn signals - Inductive sensors to indicate presence of cars - Left-turn signals

83. PROBLEM: Does this accept the empty string?
a,b,c b 1 a 2 a 3
From the 2008W2 quiz notes. The empty string causes no end of trouble to students even though it’s absolutely the SIMPLEST case.
b,c c

84. “Moore Machines”  DFAs whose state matters
A “Moore Machine” is a DFA that’s not about accepting or rejecting but about what state it’s in at a particular time. Let’s work with a specific example...