1. Status Register
Status = system byte (supervisor only) + user byte = system status + condition code register
usually, it is not important to know the order of the bits in this register
Fig 2-4 from M /16-/32-Bit Microprocessors User’s Manual [pdf, 184p; Motorola]

2. Status Register … system byte
T - trace
= 1 in trace mode
= 0 otherwise
> single step instruction trace
S - supervisor
= 1 in supervisor mode
= 0 in user mode
I2I1I0 - interrupt mask
= coded interrupt level
e.g. STOP #$2700
If supervisor state
then
[SR] ← <#data>
STOP
else
privilege violation

3. Status Register … condition codes
N - negative
= 1 if the most significant bit of an operand or result is 1
Z - zero
= 1 if all bits in the operand or result are 0
V - overflow
= 1 if an out-of-range condition, i.e. overflow, occurs in signed arithmetic
C - carry
= 1 if a carry is generated out of the most significant bit during an arithmetic operation; if borrow generated during subtract – indicates an overflow in unsigned arithmetic
X - extend (extended carry)
- used in multiple precision arithmetic (typically mirrors C, the carry)

4. Condition Code Notation
Condition code register representation in reference manuals follow a standard convention:
* Set according to the result of the operation.
- Not affected by the operation; contents of the bit are not changed.
0 Cleared, i.e. bit set to 0.
1 Set, i.e. bit set to 1.
U Undefined or unpredictable after the operation.
? Unstable (Intel – does not apply to us)
e.g. AND X N Z V C LSL X N Z V C
- * * * * * 0 *

5. Binary Arithmetic + CCR
e.g
C = X =
N =
Z =
V =

6. Binary Arithmetic + CCR
e.g
C = X =
N =
Z =
V =

7. Binary Arithmetic + CCR
e.g
C = X =
N =
Z =
V =

8. Using the Condition Codes
the machine does 2’s complement arithmetic
the machine generates ALL the flags
the machine does not know if you are doing signed or unsigned operations
you pick which flags are appropriate to your operation

9. A language is like a bar
Python bar .
C bar
Assembly language bar

10. Valid flags for unsigned arithmetic
Carry
= 1 → result incorrect → can not be stored → unsigned overflow
= 0 → result correct
Zero
= 1 → result is zero
= 0 → result is not zero
e.g. A – B
if C=0 A B
if C=1 A B
if C=0 and Z=0 A B
if C=1 or Z=1 A B

11. Conditional Branch … Bcc
M68000 Assembly Language [p16, N. Znotinas]
conditional branches
come in pairs to test complementary cases e.g. equal to zero or not equal to zero
syntax: Bcc label
for unsigned arithmetic:
BHI | BLS Br high |Br low or same
BCC | BCS Br C clear |Br C set
BHS*| BLO* Br high/same |Br low
BNE | BEQ Br not equal |Br equal
* depends on IDE if synonym accepted

12. Loops … counting loops in assembly language
simple counting loops count down to zero
before loop: initialize count register to maximum count
in loop: decrement count register
at end of loop: test if count is zero
if count not zero: branch to the start of the loop
if count is zero: drop through to next instruction

13. Write a program to calculate x**y, given x and y.

14. Reading/Expectations:
M /16-/32-Bit Microprocessors User’s Manual - section: Status Register
M68000 Assembly Language [pdf, 92p; N. Znotinas]
Look at the condition codes for the MOVE, ADD, AND, ASR/L, CLR, EOR, LSR/L, MULS, MULU, NOT, OR, SUB commands.
Focusing on N, V, Z, and C for the above instructions, do you understand why some flags are cleared, some are set, and some depend on the operation of the instruction
Note that instructions that work specifically on addresses do not modify the flags (with one exception not shown here). See: ADDA, MOVEA, SUBA.
Expectations:
You can determine the state of the C, Z, N, and V condition code bits for any operation.