1. Licensed Electrical & Mechanical Engineer BMayer@ChabotCollege.edu
Engineering 43
Chp 14-2 Op Amp Circuits
Bruce Mayer, PE
Licensed Electrical & Mechanical Engineer

2. RC OpAmp Circuits
Introduce Two Very Important Practical Circuits Based On Operational Amplifiers
Recall the OpAmp
The “Ideal” Model That we Use
RO = 0
Ri = ∞
Av = ∞
BW = ∞
Consequences of Ideality
RO = 0  vO = Av(v+−v−)
Ri = ∞  i+ = i− = 0
Av = ∞  v+ = v−
BW = ∞  OpAmp will follow the very Highest Frequency Inputs

3. RC OpAmp Ckt  Integrator
Have Negative FeedBack so summing point constraint applies = + v
KCL At v− node
By Ideal OpAmp
Ri = ∞  i+ = i− = 0
Av = ∞  v+ = v− = 0

4. RC OpAmp Integrator cont
Separating the Variables and Integrating Yields the Solution for vo(t)
By the Ideal OpAmp Assumptions
Note use of dummy variables in integrals
Thus the Output is a (negative) SCALED TIME INTEGRAL of the input Signal
A simple Differential Eqn

5. RC OpAmp Ckt  Differentiator
KVL
Have Negative FeedBack so summing point constraint applies = + v
By Ideal OpAmp
v− = GND = 0V
i− = 0
KCL at v−
Now the KVL

6. RC OpAmp Differentiator cont.
Recall the Capacitor Integral Law
Thus the KVL
ReCall Ideal OpAmp Assumptions
Ri = ∞  i+ = i− = 0
Av = ∞  v+ = v− = 0
Then the KCL
Multiply Eqn by C1, then Take the Time Derivative of the new Eqn

7. RC OpAmp Differentiator cont
Examination of this Eqn Reveals That if R1 were ZERO, Then vO would be Proportional to the TIME DERIVATIVE of the input Signal
In Practice An Ideal Differentiator Amplifies Electrical Noise And Does Not Operate well
The Resistor R1 Introduces a Filtering Action.
Its Value Is Kept As Small As Possible To Approximate a Differentiator
In the Previous Differential Eqn use KCL to sub vO for i1
Using

8. Aside → Electrical Noise
ALL electrical signals are corrupted by external, uncontrollable and often unmeasurable, signals. These undesired signals are referred to as NOISE
Signal
Noise
The Signal-To-Noise Ratio
Use an Ideal Differentiator
Signal
Noise
Simple Model For A Noisy 1V, 60Hz Sinusoid Corrupted With One MicroVolt of 1GHz Interference
The SN is Degraded Due to Hi-Frequency Noise

9. Class Exercise  Ideal Differen.
Let’s Turn on the Lites for 10 minutes for YOU to Differentiate
Given the IDEAL Differentiator Ckt and INPUT Signal
Find vo(t) over 0-10 ms
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Given Input v1(t)
SAWTOOTH Wave
Recall the Differentiator Eqn
R1 = 0; Ideal ckt

10. RC OpAmp Differentiator Ex.
The Slope from 0-5 mS
For the Ideal Differentiator
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Given Input v1(t)
Units Analysis

11. RC OpAmp Differentiator cont.
A Similar Analysis for 5-10 mS yields the Complete vO
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Derivative Scalar PreFactor
OutPut
InPut
Apply the Prefactor Against the INput Signal Time-Derivative (slope)

12. RC OpAmp Integrator Example
For the Ideal Integrator
Units Analysis Again
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Given Input v1(t)
SQUARE Wave

13. RC OpAmp Integrator Ex. cont.
0<t<0.1 S
v1(t) = 20 mV (Const)
0.1t<0.2 S
v1(t) = –20 mV (Const)
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The Integration PreFactor
Next Calculate the Area Under the Curve to Determine the Voltage Level At the Break Points
Integrate In Similar Fashion over
0.2t<0.3 S
0.3t<0.4 S

14. RC OpAmp Integrator Ex. cont.1
Apply the 1000/S PreFactor and Plot Piece-Wise
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15. Skip for 16May17 Meeting Design Example
Design an OpAmp ckt to implement in HARDWARE this Math Relation
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Examine the Reln to find an
Integrator
Summer

16. Skip for 16May17 Meeting Design Example The Proposed Solution
The by Ideal OpAmps & KCL & KVL & Superposition
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17. Skip for 16May17 Meeting Design Example The Ckt Eqn
Then the Design Eqns
This means that we, as ckt designers, get to PICK 3 values
For 1st Cut Choose
C = 20 μF
R1 = 100 kΩ
R4 = 20 kΩ
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TWO Eqns in FIVE unknowns

18. Skip for 16May17 Meeting Design Example In the Design Eqns
20μ
20k
20k
100k
10k
Skip for 16May17 Meeting
If the voltages are <10V, then all currents should be the in mA range, which should prevent over-heating
Then the DESIGN

19. LM741 OpAmp Schematic
In many OpAmp Designs MOSFETS have Replaced the BJT’s

20. Some LM741 Specs

21. OpAmp Frequency Response
The Ideal OpAmp has infinite Band- Width so NO Matter how FAST the input signals
However, REAL OpAmps Can NOT Keep up with very fast signals
The Open Loop Gain, AO, starts to degrade with increasing input frequencies

22. The Unity Gain Frequency, ft, is the BandWidth Spec
Gain∙BandWidth for LM741
−20db/Decade Slope
The Unity Gain Frequency, ft, is the BandWidth Spec

23. BandWidth Limit Implications
Recall the OpAmp based Inverting ckt
The NONideal Analysis yielded
Noting That All the R’s are Constant; ReWrite above as
For Very Large A

24. BandWidth Limit Implications
As Frequency Increases the Open-Loop gain, A, declines so the Limit does NOT hold in: If
Then the Denom in the above Eqn ≠ 1
Thus significantly smaller A DECREASES the Ideal gain
For Typical Values of the R’s the Open-Loop Gain, A, becomes important when A is on the order of about 1000

25. Gain∙BandWidth for LM741
Frequency significantly degrades Amplification Performance for Source Frequencies > 10 kHz

26. Voltage Swing Limitations
Real OpAmps Can NOT deliver Unlimited Voltage-Magnitude Output
Recall the LM741 Spec Sheet that show a Voltage Output Swing of about ±15V
For Source Voltages of ±20 V
If the Circuit Analysis Predicts vo of more than the Swing, the output will be “Clipped”
Consider the Inverting Circuit:
ENGR43_Lec14b_OpAmp_V_Swing_Plot_1204.m

27. ENGR43_Lec14b_OpAmp_V_Swing_Plot_1204.m
Vswing Clipping
Since the Real OutPut can NOT exceed 15V, the cosine wave Voltage OutPut is “Clipped Off” at the Swing Spec of 15V
ENGR43_Lec14b_OpAmp_V_Swing_Plot_1204.m
ENGR43_Lec14b_OpAmp_V_Swing_Plot_1204.m

28. Short-Ckt Current Limitations
Real OpAmps Can NOT deliver Unlimited Current-Magnitude Output
Recall the LM741 Spec Sheet that shows an Output Short Circuit Current of about 25mA
If the Circuit Analysis Predicts io of more than This Current, the output will also be “Clipped”
Consider the Inverting Circuit:
ENGR43_Lec14b_OpAmp_V_Swing_Plot_1204.m

29. ENGR43_Lec14b_OpAmp_Current_Saturation_Plot_1204.m
Since the Real OutPut can NOT exceed 25mA, the cosine wave Current OutPut is “Clipped Off” at the Short Circuit Current spec of 25mA
ENGR43_Lec14b_OpAmp_V_Swing_Plot_1204.m
ENGR43_Lec14b_OpAmp_Current_Saturation_Plot_1204.m

30. Slew Rate = dvo/dt
For a Real OpAmp we expect the OutPut Cannot Rise or Fall Infinitely Fast.
This Rise/Fall Speed is quantified as the “Slew Rate”, SR
Mathematically the Slew Rate limitation
The 741 Specs indicate a Slew Rate of

31. Slew Rate = dvo/dt
If dvin/dt exceeds the SR at any point in time, then the output will NOT be Faithful to input
The OpAmp can NOT “Keep Up” with the Input
Consider the Example at Top Right
Then the Time Slope of the Source

32. Slew Rate = dvo/dt
The Maximum value of dvS/dt Occurs at t=0. Compare the max to the SR
Thus the source Rises & Falls Faster than the SR
When the Source Slope exceeds the SR the OpAmp Output Rises/Falls at the SR
This produces a STRAIGHT-LINE output with a slope of the SR when the source rises/falls Faster than the SR until the OpAmp “Catches Up” with the Ideal OutPut

33. Slew Rate = dvo/dt

34. Full Power BandWidth
The Full Power BW is the Maximum Frequency that the OpAmp can Deliver an UnDistorted Sinusoidal Signal
The Quantity, fFP, is limited by the SLEW RATE
Determine This Metric for the LM741
The 741 has a max output, Vom, of ±12V
Applying a sinusoid to the input find at full OutPut power (Full Output Voltage)
Recall the Slew Rate

35. Full Power BandWidth Taking d/dt of the OpAmp running at Full Output
Thus the maximum output change-rate (slope) in magnitude
Recall ω = 2πf
Setting |dvo/dt|max = to the Slew Rate
Cos(n*pi*t) is max at 1.0

36. Full Power BandWidth Isolating f in the last expression yields fFP:
From the LM741 Spec Sheet
SR = 0.5 V/µS
|Vomax|min = 12V
Then fFP:

37. Full Power BandWidth
Thus the 741 OpAmp can deliver UNdistorted, Full Voltage, sinusoidal Output (±12V) for input Frequencies up to about 6.63 kHz

38. Find Energy Stored on Cx
WhiteBoard Work
Let’s Work These Probs
Choose C Such That
Probs 5.64 & 5FE-3 in 7e text
Find Energy Stored on Cx

39. OpAmp Circuit Design All Done for Today

40. Registered Electrical & Mechanical Engineer BMayer@ChabotCollege.edu
Engineering 43
Appendix
Bruce Mayer, PE
Registered Electrical & Mechanical Engineer

46. Practical Example
Simple Circuit Model For a Dynamic Random Access Memory Cell (DRAM)
Note How Undesired Current Leakage is Modeled as an I-Src
Also Note the TINY Value of the Cell-State Capacitance (50x10-15 F)

47. Practical Example cont
During a WRITE Cycle the Cell Cap is Charged to 3V for a Logic-1
Thus The TIME PERIOD that the cell can HOLD the Logic-1 value
The Criteria for a Logic “1”
Vcell >1.5 V
Now Recall that V = Q/C
Or in terms of Current
After write at time-Zero: Vc(0) = 3V, ic = Ileak = const => Vc = 3V - Ileak*t/C
Now Can Calculate the DRAM “Refresh Rate”

48. Practical Example cont.2
Consider the Cell at the Beginning of a READ Operation
When the Switch is Connected Have Caps in Parallel
Then The Output
Best Case is a fully charged Cell Capacitance
Calc the Best-Case Change in VI/O at the READ