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ASIC PMm2 Pierre BARRILLON, Sylvie BLIN, Selma CONFORTI,
Frédéric DULUCQ, Christophe de LA TAILLE, Gisèle MARTIN-CHASSARD, Ludovic RAUX
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3 discri thresholds (3*12 bits)
MAROC chip Multi Anode Read Out Chip 64 channels, variable gain, 64 triggers, multiplexed digitized charge measurement Performances: Variable gain preamp PMs non-uniformity correction Trigger at 1/3 p.e (= 106) Dynamic range: 0 30 p.e (0 5pC) Noise = 2fC Linearity ~ 2% Cross-talk < 1% MAROC3 layout (November 2007) Technology: AMS SiGe 0.35 mm Die : 4 X 4.2 mm2 Hold signal Photomultiplier 64 channels Photons Variable Gain Preamp. Slow Shaper ns S&H Bipolar Fast Shaper Unipolar Gain correction 64*6bits 3 discri thresholds (3*12 bits) Multiplexed Analog charge output LUCID 3 DACs 12 bits 80 MHz encoder 64 Wilkinson 12 bit ADC 64 trigger outputs Digital charge output 64 inputs 8 février 2008 Gisèle Martin-Chassard
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Gisèle Martin-Chassard
SPIROC chip Sipm Integrated Read Out Chip 36 SIPM readout channels designed in June 07 for CALICE AHCAL (ILC) Now in test SPIROC Techno: AMS SiGe 0.35 mm Package : CQFP240 Area: 36 mm2 8 février 2008 Gisèle Martin-Chassard
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Gisèle Martin-Chassard
SPIROC chip Charge measurement : 2 gains (dynamic range : 1 pe 2000 pe) / 12 bit ADC Variable shaping time (50ns 100ns ) Time measurement : 12 bit TDC (step~100 ps) Fast shaper : ~15ns Auto-Trigger on ½ pe DAC 8 bits (0-5V) for SiPM gain adjustment Bunch crossing Ch. 0 Ch. 1 Analog channel Analog mem. 36-channel 12 bit Wilkinson ADC for charge and time Meas. Ch. 35 12-bit counter Time digital mem. Event builder Memory pointer Trigger control Main SRAM Com module HCAL SLAB 8 février 2008 Gisèle Martin-Chassard
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Gisèle Martin-Chassard
PMm2 front-end ASIC Complete front-end chip with 16 channels To be submitted in march or June 2008 Technology : AMS SiGe 0.35 mm Characteristics : 16 inputs preamplifier Variable gain :1 5 (4bits) (common on 16 channels) PMTs gain adjustment by a factor 4 (8 bits) (channel by channel) Dynamic range : 0 300 pe Good linearity (1%) 16 trigger outputs: Fast shaper (t=15ns) Low offset discriminator Threshold provided by common 10bit DAC + 4bit DAC /channel (1/3 pe) “OR” of 16 triggers output 1 digitized and multiplexed charge output : Slow shaper with variable shaping time (t=50ns,100ns,200ns) SCA with depth 2 A complete front end chip with 64 channels was submitted in last June and expected in this October. I would like remind you of MAROC1 functionality blocks. MAROC1 contains/is composed of a variable gain preamplifier to adjust the PM gain per channel from 0 to 4. We have one multiplexed charge output where we can change the peaking time of slow shaper from 20ns to 200ns. Otherwise there are 64 trigger outputs which can be due to Bipolar Fast shaper or Unipolar Fast Shaper The unipolar Fast Shaper is followed by 3 discriminators to close to LUCID needs Each threshold is fixed by internal DAC 8 février 2008 Gisèle Martin-Chassard
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Gisèle Martin-Chassard
PMm2 front-end ASIC (2) Coarse time measurement : 24 bit 10MHz Step : 100ns 12 bit ADC for charge and fine time measurement : Wilkinson type ADC T&H on slow shaper for charge measurement T&H on TDC ramp (100ns) for fine time measurement 2 discriminators with 12 bit ramp (100ms) as threshold Serialization of digital output information : Channel number - time stamp – fine time – charge 4bits 24bits bits bits A complete front end chip with 64 channels was submitted in last June and expected in this October. I would like remind you of MAROC1 functionality blocks. MAROC1 contains/is composed of a variable gain preamplifier to adjust the PM gain per channel from 0 to 4. We have one multiplexed charge output where we can change the peaking time of slow shaper from 20ns to 200ns. Otherwise there are 64 trigger outputs which can be due to Bipolar Fast shaper or Unipolar Fast Shaper The unipolar Fast Shaper is followed by 3 discriminators to close to LUCID needs Each threshold is fixed by internal DAC 8 février 2008 Gisèle Martin-Chassard
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PMm2 ASIC ARCHITECTURE (analog part)
ramp TDC Internal read MAROC SPIROC SPIROC like NEW Channel 16 Read Channel 1 1 digital time output 12 bits ADC Track & hold Vref SSH 1 digital charge output 12 bits ADC CRRC2 Slow Shaper (50 , 100, 200 ns) Track & hold 16 charge inputs Variable Gain Amplifier (1-5) Hold 1 ext. Common Hold variable delay OR 1 OR output Fast Shaper (15ns) Gain Correction (8bits) Vref FSH Discri 16 Trigger outputs Vref SSH DAC 4 bits 24 bits counter 10MHz absolute time measurement Bandgap DAC 10 bits Threshold Common bloc in channel bloc 8 février 2008 Gisèle Martin-Chassard
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Detail of one channel analog part
MAROC SPIROC SPIROC like NEW Internal read time Output x1 TDC ramp Stop fine time counter x1 Ck 24 bits counter 10MHz Coarse time data ADC ramp T&H x1 Ck 24 bits counter 10MHz Coarse time data Stop charge counter x1 Charge Output Slow Shaper t=50ns,100ns or 200ns in Auto-trigger delay Adjustable and variable gain amplifier G= 1-5 Adjust = 1-4 50 W Discri Trigger Output Fast Shaper t= 15ns Threshold 4-bit DAC 8 février 2008 Gisèle Martin-Chassard
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Variable slow shaper outputs
PMm2 ASIC simulations Slow shaper output Preamplifier output RC=50ns RC=100ns Variable slow shaper outputs RC=200ns A complete front end chip with 64 channels was submitted in last June and expected in this October. I would like remind you of MAROC1 functionality blocks. MAROC1 contains/is composed of a variable gain preamplifier to adjust the PM gain per channel from 0 to 4. We have one multiplexed charge output where we can change the peaking time of slow shaper from 20ns to 200ns. Otherwise there are 64 trigger outputs which can be due to Bipolar Fast shaper or Unipolar Fast Shaper The unipolar Fast Shaper is followed by 3 discriminators to close to LUCID needs Each threshold is fixed by internal DAC 8 février 2008 Gisèle Martin-Chassard
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Gisèle Martin-Chassard
ADC performance Wilkinson type 64 channels 12 bits 80 µs conversion time 8 février 2008 Gisèle Martin-Chassard
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Gisèle Martin-Chassard
Conclusion MAROC : Measured circuit Used for PMTs characterization But low dynamic range SPIROC : Circuit with time measurement Now in test New development for PMm2: Time measure (step 1ns) High dynamic range Serialized data output Proto send in June 08 Chip test in fall 2008 8 février 2008 Gisèle Martin-Chassard
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