1. Interfacing I/O Devices

2. Bus control signals
8085
IO/M RD WR
MEMR
MEMWR
IOWR

3. Interfacing I/O Devices
Using I/O devices data can be transferred between the microprocessor and the outside world.
This can be done in groups of 8 bits using the entire data bus. This is called parallel I/O.
The other method is serial I/O where one bit is transferred at a time using the SI and SO pins on the Microprocessor.

4. Dealing with I/O Devices
Consider them like any other memory location.
They are assigned a 16-bit address within the address range of the 8085.
The exchange of data with these devices follows the transfer of data with memory. The user uses the same instructions used for memory.
This is called memory-mapped I/O.

5. Dealing with I/O Devices
Treat them separately from memory:
I/O devices are assigned a “port number” within the 8-bit address range of 00H to FFH.
The user in this case would access these devices using the IN and OUT instructions only.
This is called I/O-mapped I/O or Peripheral-mapped I/O.

6. Basic interfacing concepts
The first step in interfacing an I/O device would be to determine which instructions will be used to access it.
IN/OUT instructions
Peripheral-mapped I/O device.
Data transfer instructions (LDA, STA, etc.)
Memory mapped I/O device.

7. Peripheral I/O instructions
There are two instructions:
IN brings data (8-bits) from an input device to the accumulator
OUT brings data (8-bits) from the accumulator to an output device.
They are both 2 byte instructions with the second byte holding the 8-bit address of the device.

8. Peripheral I/O instructions
Given that there are separate instructions for input and output, the 8085 can actually communicate with 256 different input devices AND an additional 256 different output devices.

9. Comparison of Memory Mapped I/O and Peripheral I/O
Characteristics
Memory Mapped I/O
Peripheral I/O
Device Address
16 bit
8 bit
Control signals
MEMR/MEMW
IOR/IOW
Instructions
STA,LDA,STAX,LDAX, MOV M,R ADDM etc.
IN, OUT
Data transfer
Between any register and IO
Only between I/O and the accumulator

10. Comparison of Memory Mapped I/O and Peripheral I/O
Characteristics
Memory Mapped I/O
Peripheral I/O
Maximum No. of I/Os possible
64K is shared between I/Os and system memory
256 input devices and 256 output devices
Execution speed
13 T-states(STA,LDA)
7 T-states (MOV M,R)
10 T- states
Hardware Requirements
More hardware is needed to decode 16 bit address
Less Hardware is required to decode 8 bit address
Other features
Arithmetic and logical operations can be directly performed with I/O data
Not Available