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UNIT-5 CHANNEL CODING
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CONVOLUTION CODES Convolutional codes map information to code bits sequentially by convolving a sequence of information bits with “generator” sequences. A convolutional encoder encodes K information bits to N>K code bits at one time step . Convolutional codes can be regarded as block codes for which the encoder has a certain structure such that we can express the encoding operation as convolution.
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TYPES OF ERRORS
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Single bit errors are the least likely type of errors in serial data transmission because the noise must have a very short duration which is very rare. However this kind of errors can happen in parallel transmission. Example: If data is sent at 1Mbps then each bit lasts only 1/1,000,000 sec. or 1 μs. For a single-bit error to occur, the noise must have a duration of only 1 μs, which is very rare.
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BURST ERROR
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The term burst error means that two or more bits in the data unit have changed from 1 to 0 or from 0 to 1. Burst errors does not necessarily mean that the errors occur in consecutive bits, the length of the burst is measured from the first corrupted bit to the last corrupted bit. Some bits in between may not have been corrupted.
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Burst error is most likely to happen in serial transmission since the duration of noise is normally longer than the duration of a bit. The number of bits affected depends on the data rate and duration of noise. Example: If data is sent at rate = 1Kbps then a noise of 1/100 sec can affect 10 bits.(1/100*1000) If same data is sent at rate = 1Mbps then a noise of 1/100 sec can affect 10,000 bits.(1/100*106)
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ERROR DETECTION Error detection means to decide whether the received data is correct or not without having a copy of the original message. Error detection uses the concept of redundancy, which means adding extra bits for detecting errors at the destination. Make sense of message.
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REDUNDANCY
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Four Types Of Redundancy Checks Are Used In Data Communications
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VERTICAL REDUNDANCY CHECK
VRC
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PERFORMANCE It can detect single bit error
It can detect burst errors only if the total number of errors is odd.
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LONGITUDINAL REDUNDANCY CHECK
LRC
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PERFORMANCE LCR increases the likelihood of detecting burst errors.
If two bits in one data units are damaged and two bits in exactly the same positions in another data unit are also damaged, the LRC checker will not detect an error.
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VRC and LRC
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CYCLIC REDUNDANCY CHECK
CRC
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CYCLIC REDUNDANCY CHECK
Given a k-bit frame or message, the transmitter generates an n-bit sequence, known as a frame check sequence (FCS), so that the resulting frame, consisting of (k+n) bits, is exactly divisible by some predetermined number. The receiver then divides the incoming frame by the same number and, if there is no remainder, assumes that there was no error.
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Binary Division
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Checksum
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At the sender The unit is divided into k sections, each of n bits.
All sections are added together using one’s complement to get the sum. The sum is complemented and becomes the checksum. The checksum is sent with the data
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At the receiver The unit is divided into k sections, each of n bits.
All sections are added together using one’s complement to get the sum. The sum is complemented. If the result is zero, the data are accepted: otherwise, they are rejected.
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PERFORMANCE The checksum detects all errors involving an odd number of bits. It detects most errors involving an even number of bits. If one or more bits of a segment are damaged and the corresponding bit or bits of opposite value in a second segment are also damaged, the sums of those columns will not change and the receiver will not detect a problem.
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Error Correction It can be handled in two ways:
receiver can have the sender retransmit the entire data unit. The receiver can use an error-correcting code, which automatically corrects certain errors.
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Single-bit error correction
To correct an error, the receiver reverses the value of the altered bit. To do so, it must know which bit is in error. Number of redundancy bits needed Let data bits = m Redundancy bits = r Total message sent = m+r The value of r must satisfy the following relation: 2r ≥ m+r+1
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ERROR CORRECTION
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HAMMING CODE
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HAMMING CODE
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Hamming Code
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Example of Hamming Code
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Single-bit error
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Error Detection
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PARITY CHECK CODES information bits transmitted = k
bits actually transmitted = n = k+1 Code Rate R = k/n = k/(k+1) Error detecting capability = 1 Error correcting capability = 0
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CYCLIC CODES Special case of Linear Block Codes
Cyclic shift of a codeword is also a codeword Easy to encode and decode, Can correct continuous bursts of errors CRC (used in Wireless LANs), BCH codes, Hamming Codes, Reed Solomon Codes (used in CDs)
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CONVOLUTIONAL CODES Block codes require a buffer Example k = 1 n = 2
Rate R = ½
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CONVOLUTIONAL CODES Encoder consists of shift registers forming a finite state machine Decoding is also simple – Viterbi Decoder which works by tracking these states First used by NASA in the voyager space programme Extensively used in coding speech data in mobile phones
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ERROR CONTROL CODING Extra bits are added to the data at the transmitter (redundancy) to permit error detection or correction at the receiver Done to prevent the output of erroneous bits despite noise and other imperfections in the channel The positions of the error control coding and decoding are shown in the transmission model
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ERROR MODELS Many other types
Burst errors, i.e., contiguous bursts of bit errors output from DFE (error propagation) common in radio channels Insertion, deletion and transposition errors We will consider mainly random errors
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Forward Error Correction (FEC)
Coding designed so that errors can be corrected at the receiver Appropriate for delay sensitive and one-way transmission (e.g., broadcast TV) of data Two main types, namely block codes and convolutional codes. We will only look at block codes
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ERROR CONTROL TECHNIQUES
Error detection in a block of data Can then request a retransmission, known as automatic repeat request (ARQ) for sensitive data Appropriate for Low delay channels Channels with a return path Not appropriate for delay sensitive data, e.g., real time speech and data
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Forward Error Correction (FEC)
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Forward error correction (FEC) or channel coding is a technique used for controlling errors in data transmission over unreliable or noisy communication channels. The central idea is the sender encodes the message in a redundant way by using an error-correcting code (ECC). FEC gives the receiver the ability to correct errors without needing a reverse channel to request retransmission of data, but at the cost of a fixed, higher forward channel bandwidth. FEC is therefore applied in situations where retransmissions are costly or impossible, such as one-way communication links and when transmitting to multiple receivers in multicast. FEC information is usually added to mass storage devices to enable recovery of corrupted data, and is widely used in modems.
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FEC processing in a receiver may be applied to a digital bit stream or in the demodulation of a digitally modulated carrier. Many FEC coders can also generate a bit-error rate (BER) signal which can be used as feedback to fine-tune the analog receiving electronics. The noisy-channel coding theorem establishes bounds on the theoretical maximum information transfer rate of a channel with some given noise level. The maximum fractions of errors or of missing bits that can be corrected is determined by the design of the FEC code.
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Automatic Repeat Request (ARQ)
Automatic Repeat reQuest (ARQ), also known as Automatic Repeat Query, is an error-control method for data transmission that uses acknowledgements and timeouts to achieve reliable data transmission over an unreliable service. If the sender does not receive an acknowledgment before the timeout, it usually re-transmits the frame/packet until the sender receives an acknowledgment or exceeds a predefined number of re-transmissions. The types of ARQ protocols include Stop-and-wait ARQ Go-Back-N ARQ Selective Repeat ARQ All three protocols usually use some form of sliding window protocol to tell the transmitter to determine which (if any) packets need to be retransmitted.
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BLOCK CODES Data is grouped into blocks of length k bits (dataword)
Each dataword is coded into blocks of length n bits (codeword), where in general n>k This is known as an (n,k) block code A vector notation is used for the datawords and codewords, Dataword d = (d1 d2….dk) Codeword c = (c1 c2……..cn) The redundancy introduced by the code is quantified by the code rate, Code rate = k/n i.e., the higher the redundancy, the lower the code rate
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Block Code - Example Data word length k = 4 Codeword length n = 7
This is a (7,4) block code with code rate = 4/7 For example, d = (1101), c = ( )
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Error Control Process Decoder gives corrected data
May also give error flags to Indicate reliability of decoded data Helps with schemes employing multiple layers of error correction
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PARITY CODES Example of a simple block code – Single Parity Check Code
In this case, n = k+1, i.e., the codeword is the dataword with one additional bit For ‘even’ parity the additional bit is, For ‘odd’ parity the additional bit is 1-q That is, the additional bit ensures that there are an ‘even’ or ‘odd’ number of ‘1’s in the codeword
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Parity Codes – Example 1 Even parity (i) d=(10110) so, c=(101101)
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PARITY CODES – EXAMPLE 2 Coding table for (4,3) even parity code
Dataword Codeword
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PARITY CODES To decode Code can detect single errors
Calculate sum of received bits in block (mod 2) If sum is 0 (1) for even (odd) parity then the dataword is the first k bits of the received codeword Otherwise error Code can detect single errors But cannot correct error since the error could be in any bit For example, if the received dataword is (100000) the transmitted dataword could have been (000000) or (110000) with the error being in the first or second place respectively Note error could also lie in other positions including the parity bit.
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HAMMING DISTANCE Error control capability is determined by the Hamming distance The Hamming distance between two codewords is equal to the number of differences between them, e.g., have a Hamming distance = 3 Alternatively, can compute by adding codewords (mod 2) = (now count up the ones)
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HAMMING DISTANCE The Hamming distance of a code is equal to the minimum Hamming distance between two codewords If Hamming distance is: 1 – no error control capability; i.e., a single error in a received codeword yields another valid codeword XXXXXXXX is a valid codeword Note that this representation is diagrammatic only. In reality each codeword is surrounded by n codewords. That is, one for every bit that could be changed
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HAMMING DISTANCE If Hamming distance is:
2 – can detect single errors (SED); i.e., a single error will yield an invalid codeword XOXOXO X is a valid codeword O in not a valid codeword See that 2 errors will yield a valid (but incorrect) codeword
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HAMMING DISTANCE The maximum number of detectable errors is
That is the maximum number of correctable errors is given by, where dmin is the minimum Hamming distance between 2 codewords and means the smallest integer
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LINEAR BLOCK CODES parity bits n-k (=1 for Parity Check)
Message m = {m1 m2 … mk} Transmitted Codeword c = {c1 c2 … cn} A generator matrix Gkxn
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LINEAR BLOCK CODES Linearity Example : 4/7 Hamming Code k = 4, n = 7
4 message bits at (3,5,6,7) 3 parity bits at (1,2,4) Error correcting capability =1 Error detecting capability = 2
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LINEAR BLOCK CODES If there are k data bits, all that is required is to hold k linearly independent code words, i.e., a set of k code words none of which can be produced by linear combinations of 2 or more code words in the set. The easiest way to find k linearly independent code words is to choose those which have ‘1’ in just one of the first k positions and ‘0’ in the other k-1 of the first k positions.
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LINEAR BLOCK CODES For example for a (7,4) code, only four codewords are required, e.g., So, to obtain the codeword for dataword 1011, the first, third and fourth codewords in the list are added together, giving This process will now be described in more detail
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An (n,k) block code has code vectors
d=(d1 d2….dk) and c=(c1 c2……..cn) The block coding process can be written as c=dG where G is the Generator Matrix
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Thus, ai must be linearly independent, i.e., Since codewords are given by summations of the ai vectors, then to avoid 2 datawords having the same codeword the ai vectors must be linearly independent. Sum (mod 2) of any 2 codewords is also a codeword, i.e., Since for datawords d1 and d2 we have;
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So, 0 is always a codeword, i.e., Since all zeros is a dataword then,
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DECODING LINEAR CODES One possibility is a ROM look-up table
In this case received codeword is used as an address Example – Even single parity check code; Address Data ……… . Data output is the error flag, i.e., 0 – codeword ok, If no error, dataword is first k bits of codeword For an error correcting code the ROM can also store datawords.
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