1. Lets Design an LNA!
Anurag Nigam

2. Design Target Most important design target is- Receiver Sensitivity
Low Noise Figure (Noise Factor) of the Low Noise Amplifier
Passive Mixers are the best in terms of noise figure but do not offer sufficient conversion gain. Active mixers provide best conversion gain but are noisy. Both are desirable electrical characteristics. In former case an amplifier at the input would improve the gain of the two stages thus improving sensitivity of the receiver. In latter case an amplifier at the input will reduce the noise of the mixer referred to antenna thus improving the sensitivity of the receiver.
Receiver Sensitivity
Figure 1: LNA-Mixer at input of the receiver
Receiver Sensitivity (V)
Noise Factor at the receiver input
Boltzmann’s Constant (J/K)
Receiver Bandwidth (Hz)
Ambient Temperature (K)
Minimum S/N Ratio at the detector
Characteristic Impedance (Ω)
Mixer
LNA
IF+
IF-
Local Oscillator (57 GHz)
(4.8 – 6.5 GHz)
(61.8 – 63.5 GHz)
Noise Factors
Minimum Signal strength that can be detected by the receiver faithfully is called “Receiver Sensitivity”
Gain

3. Diminishing Returns Noise Figure Data from IHP Process Manual
Measured Data
Simulated Data
(Loss De-embedded)
Figure 2: npn 200_8 device NFmin (dB) Vs Frequency. Note that at 60 GHz
(either using extrapolation or ADS Simulation) the NFmin = 4.5 dB
Figure 3: npn 200_8 device NFmin (dB) Vs Base Bias. For gain and stability each stage has to be biased slightly above the required base voltage of 0.84 V for NFmin. This results in 1.2 times the NFmin at 0.88V base bias. At 60 GHz (either using extrapolation or ADS Simulation) at 0.88V biasing the NFmin = 5.4 dB
For a tuned common emitter stage, the 60 GHz is 4.7dB. NFmin is 5.2 dB and the losses in matches are 1.4 dB. Over all Noise Figure of the tuned stage with losses is expected to be slightly above 6 dB. Clearly the process has very poor performance at 60 GHz for LNA Design.

4. Lets give it a try!
The process is not bad for learning the design flow for LNA Design. So we will go forward with the design so as to demonstrate the design flow.
LNA
60 GHz Bias De-Coupling 1 2 3 4 5
Cascode Gain Stage
Common Emitter Gain Stage
Common Base Gain Stage
Two Stage Cascode LNA
Bias Circuit
Match 1
Match 2
Match 3
Match 4
Match 5
Bias De-Coupling 1
Bias De-Coupling 2
By-Pass
Figure 4: LNA Sub-Circuits
Figure 5: Two Stage Cascode LNA

5. Common Emitter Gain Stage Design
Anurag Nigam

6. Bias Decoupling
Step1: Bias Decoupling “Option B” designed in the Mixer Design is used here. Save the design as “BiasDeCoup60GHz2.dsn”.
Figure 7: Response of Bias Decoupling using stubs at 61.8 – 63.5 GHz
Figure 6: 60 GHz Bias Decoupling

7. Common Emitter Gain Stage Design
Step2: Setup the ADS Schematic as shown in the figure for small signal tuning and simulation. Choose NPN Device of appropriate size. Connect proper bias decoupling at the collector and base as shown in the figure. Input high pass match does not require DC blocking while output is not to be blocked for DC for Cascode design. At the output use ideal DC blocking. Choose base current such that base voltage is 0.85 V for best Noise Figure. Tune input and output to 50 Ω.
Figure 8: Tuned Common Emitter Stage

8. Common Emitter Gain Stage Response
Step3: Add source and load stability simulation components to the schematic. Enable “Calculate Noise” in simulation component. Plot the results as shown in the figure.
Figure 9: Small Signal Response of Common Emitter Gain Stage

9. Cascode Gain Stage Design
Anurag Nigam

10. Common Base Gain Stage Design
Step4: Setup the ADS Schematic as shown in the figure for small signal tuning and simulation. Choose NPN Device of appropriate size. Connect proper bias decoupling at the collector and emitter as shown in the figure. Base is AC grounded using stub. Input low pass match is not to be DC blocked while output is a band pass match. At the input use ideal DC blocking. Choose base current such that base-to-emitter voltage is 0.85 V for best Noise Figure. Tune input and output to 50 Ω.
Figure 10: Tuned Common Gate Stage

11. Common Base Gain Stage Response
Step5: Add source and load stability simulation components to the schematic. Enable “Calculate Noise” in simulation component. Plot the results as shown in the figure.
Figure 11: Small Signal Response of Common Base Gain Stage

12. Cascode Gain Stage Design
Step6: Connect Common Emitter and Common Base Stages as shown in the figure to result in a Cascode Stage.
Figure 12: Tuned Cascode Stage

13. Cascode Gain Stage Response
Step7: Add source and load stability simulation components to the schematic. Enable “Calculate Noise” in simulation component. Plot the results as shown in the figure.
Figure 13: Small Signal Response of Tuned Cascode Stage

14. Two Stage Cascode LNA
Anurag Nigam

15. Two Stage Cascode LNA
Step8: Two Cascode Stages can be connected in cascade fashion to give much higher gain as shown in the figure. The point to note here is that comparing Cascode Stage response and Two Stage Response it is visible that Noise Figure of second Cascode Stage does not reflect at the input. Thus Noise Figure at the input of the Receiver will no longer be affected by Noise Figure of the Mixer. The expected Noise Figure of the receiver would be in the range of 8 to 9 dB. May be a single Cascode Stage will be sufficient for the Receiver. Bias Circuit Design is same as that for the mixer expect that two additional mirror devices are used for two more currents.
Cascode1
(61.8 – 63.5 GHz)
Cascode2
Figure 14: Two Tuned Cascode Stages in Cascade Fashion

16. Cascode Gain Stage Response
Step9: Add source and load stability simulation components to the schematic. Enable “Calculate Noise” in simulation component. Plot the results as shown in the figure.
Figure 15: Small Signal Response of Two Stage LNA

17. Cascode Gain Stage Response
Step10: Perform Simulations from 0 to 120 GHz to verify out-band stability. Plot the results as shown in the figure.
Figure 16: Out-band Response to show Stability