1. EI205 Lecture 8
Dianguang Ma
Fall 2008

2. FLIP-FLOPS AND RELATED DEVICES
CHAPTER 8
FLIP-FLOPS AND
RELATED DEVICES

3. CHAPTER OVERVIEW
Bistable devices have two stable states, called SET and RESET. They are used as storage devices.
Monostable devices (monostable trigger, one-shot) have one stable state. They are used as timers.
Astable devices (multivibrator) do not have stable state. They are used as waveform generators.

4. 8-1 LATCHES A latch is a type of bistable logic device.
There are two types of latches:
S-R latch ( SET-RESET latch)
D latch (Delay latch)

5. The S-R Latch
An active-HIGH input S-R latch is formed with two cross-coupled NOR gates.
An active-LOW input S-R latch is formed with two cross-coupled NAND gates.

6. Negative-OR Equivalent of the NAND gate S-R Latch

7. The SET Operation
State diagram

8. The RESET Operation

9. The No-Change Operation

10. The Invalid Operation

11. The Invalid Operation

12. Truth Table and Logic Symbols

13. Example 8 - 1

14. The latch as a Contact-Bounce Eliminator

15. The 74LS279 Quad S-R latch

16. The Gated SR Latch

17. Example 8 - 2

18. The Gated D Latch

19. Example 8 - 3

20. 74LS75 Quad Gated D Latches

21. 8-2 EDGE-TRIGGERED FLIP-FLOPS
Edge-triggered flip-flops are synchronous bistable devices. Their outputs change states only at a specified point on a signal called clock (CLK).

22. The Edge-Triggered S-R Flip-Flop

23. The Edge-Triggered S-R Flip-Flop

24. Example 8 - 4

25. A method of Edge-Triggering

26. A method of Edge-Triggering

27. A method of Edge-Triggering

28. The Edge-Triggered D Flip-Flop

29. Example 8 - 5

30. The Edge-Triggered J-K Flip-Flop

31. The Edge-Triggered J-K Flip-Flop

32. The Toggle Operation

33. Example 8-6

34. Example 8-7

35. Asynchronous Preset and Clear Inputs
Before operation, a flip-flop must have a known state. This is done by preset ( direct set) and clear (direct reset) inputs. These are inputs that affect the state of the flip-flop independent of the clock.

36. J-K Flip-Flop with Preset and Clear Inputs

37. Example 8-8

38. IC Flip-Flops

39. IC Flip-Flops

40. Example 8-9

41. 8-3 MASTER-SLAVE FLIP-FLOPS
Master-slave flip-flops are pulse-triggered.
A master-slave flip-fop consists of two gated latches.
Data are entered into it at the leading edge of the clock, but the output does not reflect the input state until the trailing edge.
Master-slave flip-flops have largely been replaced by the edge-triggered devices.

42. The Master-Slave J-K Flip-Flop

43. The Master-Slave J-K Flip-Flop

44. Example 8-10

45. 8-5 FLIP-FLOP APPLICATIONS
Flip-flops are building blocks for sequential logic. There are many applications of flip-flops. For example, by using n flip-flops, we can achieve
An n-bit parallel data storage
A frequency divider of 2n A
A modulo 2n counter

46. 4-bit Register Used for Data Storage
The data on the D inputs are stored simultaneously by the flip-flops on the positive edge of the clock.

47. Divide-by-2 Device
When a pulse waveform is applied to the clock input, the Q output is a square wave with one-half the frequency of the clock input.

48. Divide-by-4 Device
When a pulse waveform is applied to the clock input, the Q output is a square wave with one-half the frequency of the clock input.

49. Modulo 4 Counter
If we take QA as the LSB and QB as the MSB, a 2-bit sequence is produced as the flip-flops are clocked.

50. 8-6 ONE-SHOTS
The one-shot is a monostable device, that is, it has only one stable state. A one-shot is normally in its stable state and will change to its unstable state only when triggered. Once it is triggered, the one-shot remains in its unstable state for a predetermined length of time and then automatically returns to its stable state. The time that the device stays in its unstable state determines the pulse width of its output.

51. A Simple One-Shot
A single narrow trigger pulse produces a single output pulse whose time duration is controlled by the RC time constant.

52. A Simple One-Shot
A single narrow trigger pulse produces a single output pulse whose time duration is controlled by the RC time constant.

53. Basic One-shot Logic Symbols

54. Nonretriggerable One-shot
A nonretriggerable one-shot will not respond to any additional trigger pulses from the time it is triggered into its unstable state (fired) until it returns to its stable state.

55. 74121: Nonretriggerable One-shot
The inputs A1, A2, and B are trigger inputs.
The RINT terminal connects to a internal timing resistor.
The CEXT and REXT/CEXT terminals connect external timing capacitor and resistor.

56. 74121: Programmable Pulse Width
TW=0.7R CEXT : 40ns to 28s

57. 74121: Function Table

58. 74121: Timing Diagram

59. 74121: Stable State 1 1 1 1 1

60. 74121: Unstable State 1

61. 74121: Schmitt-Trigger Inputs
This symbol indicates a Schmitt-trigger input. This type of input uses a special threshold circuit that produces hysteresis, a characteristic that prevents erratic switching between states when a slow-changing trigger voltage hovers around the critical input level.

62. Retriggerable One-shot
A retriggerable one-shot can be triggered before it times out.

63. 74122: Retriggerable One-shot
Retriggerable for very long output pulse, up to 100% duty cycle.

64. 74122: Function Table

65. 74122: Programmable Pulse Width
TW=0.32R CEXT(1+0.7/R)

66. Sequential Pulse Generator
This sequential timer can be used to illuminate a series of lights.

67. 8-7 THE 555 TIMER
The 555 timer is a versatile and widely used device because it can be configured in three different modes as a Schmitt trigger, a one-shot, or an oscillator.

68. Monostable (One-Shot) Operation
Trigger
Output

69. Prior to Triggering 1

70. When Triggering

71. At End of Charging Interval

72. Timing Diagram for One-Shot

73. Determine the Pulse Width

74. NE555: Circuit for Monostable Operation

75. Typical Waveform for Monostable Operation

76. Application: Missing Pulse Detector
The circuit is retriggered continuously as long as the pulse spacing is less than the timing interval.

77. Timing Waveforms for Missing Pulse Detector

78. Application: Pulse Width Modulation

79. PWM Waveforms

80. Astable Operation

81. When the Power is Turned on0V 1

82. After That

83. Timing Diagram for Oscillator

84. Determine the Frequency of Oscillation

85. NE555: Circuit for Astable Operation

86. Typical Astable Waveform

87. Frequency = f(RA, RB, C)

88. Any Duty Cycle

89. Schmitt Trigger
Schmitt trigger is a special threshold circuit that produces hysteresis. Some times, the input to a Schmitt trigger is analog so it can be considered as mixed device.
: hysteresis
Negative-going threshold voltage
Positive-going threshold voltage

90. 7414: Hex Schmitt-Trigger Inverters

91. Typical Application: Interface

92. Typical Application: Pulse Shaper

93. Typical Application: Amplitude Discriminator

94. Typical Application: Stretch Circuit

95. Configure 555 to be a Schmitt-Trigger Inverter

96. Voltage Transfer Characteristic

97. Homework
Problems 2, 4, 8, 12, 17, 20, 21, 29, 34.