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Electronics Technology
Digital Electronics Electronics Technology Landon Johnson Shift Registers
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Shift Register Competencies
39. Without references, the student will define the term “Serial Data Transmission” with 100% accuracy. 40. Without references, the student will define the term “Parallel Data Transmission” with 100% accuracy. 41. Without references, the student will define the acronym “SISO” with 100% accuracy. 42. Without references, the student will define the acronym “SIPO” with 100% accuracy.
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Shift Register Competencies
43. Without references, the student will define the acronym “PISO” with 100% accuracy. 44. Without references, the student will define the acronym “PIPO” with 100% accuracy. 45. Given a specified register, the student will draw the register with 100% accuracy 46. Given a specified SISO or SIPO register, the student will state the number of pulses to completely load the register with 100% accuracy.
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PARALLEL SHIFT REGISTER
Lab 18. PARALLEL SHIFT REGISTER
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SERIAL SHIFT REGISTER Lab 18.
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SHIFT REGISTER VOCABULARY
REGISTER- group of flip flops capable of storing data. SERIAL DATA TRANSMISSION- transfer of data from one place to another one bit at a time. PARALLEL DATA TRANSMISSION- simultaneous transfer of all bits of a data word from one place to another. SISO- SERIAL IN/SERIAL OUT- type of register that can be loaded with data serially and has only one serial output. SIPO- SERIAL IN/PARALLEL OUT- type of register that can be loaded with data serially and has parallel outputs available. PISO- PARALLEL IN/SERIAL OUT- type of register that can be loaded with parallel data and has only one serial output. PIPO- PARALLEL IN/PARALLEL OUT- type of register that can be loaded with parallel data and has parallel outputs available.
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74194A BIDIRECTIONAL UNIVERSAL SHIFT REGISTER
INTEGRATED CIRCUIT REGISTERS Lab 27. 74194A BIDIRECTIONAL UNIVERSAL SHIFT REGISTER
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OVERVIEW OF SHIFT REGISTERS
A shift register is a sequential logic device made up of flip-flops that allows parallel or serial loading and serial or parallel outputs as well as shifting bit by bit. Common tasks of shift registers: Serial/parallel data conversion UART (an example) Time delay Ring counter Twisted-ring counter or Johnson counter Memory device
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CHARACTERISTICS OF SHIFT REGISTERS
Number of bits (4-bit, 8-bit, etc.) Loading Serial Parallel (asynchronous or synchronous) Common modes of operation. Parallel load Shift right-serial load Shift left-serial load Hold Clear Recirculating or non-recirculating
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SERIAL/PARALLEL DATA CONVERSION
Shift registers can be used to convert from serial-to-parallel or the reverse from parallel-to-serial. Parallel in Parallel out Serial in Parallel out Serial out Parallel in Serial in Serial out
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SERIAL LOAD SHIFT REGISTER
Parallel outputs here. Order= A B C D Clock Pulse 6 Clear = 1 Data = 0 Clock Pulse 7 Clear = 1 Data = 1 Clock Pulse 8 Clear = 1 Data = 0 Clock Pulse 2 Clear = 1 Data = 1 Clock Pulse 5 Clear = 1 Data = 0 Clock Pulse 1 Clear = 0 Data = 1 Clock Pulse 4 Clear = 1 Data = 0 Clock Pulse 3 Clear = 1 Data = 1 Inputs here: (1) Data (2) Clock (3) Clear 4-bit serial-in parallel out shift right shift register Clock input: Positive-edge triggering Clear input: Active = 0 Deactivated = 1 Note the use of D FFs. Clock (CLK) inputs wired in parallel. Clear (CLR) inputs can be activated with LOW or disabled with HIGH. Preset (PS) inputs deactivated.
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TEST A: Serial-in, parallel-out A: 1001 A: 0010 A: 0100 A: 1100
QUESTION #5 What is the 4-bit output (bit A on left, D on right) after pulse 4? QUESTION #2 What is the 4-bit output (bit A on left, D on right) after pulse 1? QUESTION #1 This is a ___ type shift register. A. Serial-in, parallel out B. Parallel-in, serial-out QUESTION #7 What is the 4-bit output (bit A on left, D on right) after pulse 6? QUESTION #4 What is the 4-bit output (bit A on left, D on right) after pulse 3? QUESTION #6 What is the 4-bit output (bit A on left, D on right) after pulse 5? QUESTION #3 What is the 4-bit output (bit A on left, D on right) after pulse 2? A: Serial-in, parallel-out A: 1001 A: 0010 A: 0100 A: 1100 A: 1000 A: 0000 Clock Pulse 6 Clear = 1 Data = 1 Clock Pulse 4 Clear = 1 Data = 0 Clock Pulse 5 Clear = 1 Data = 1 Clock Pulse 1 Clear = 0 Data = 1 Clock Pulse 2 Clear = 1 Data = 1 Clock Pulse 3 Clear = 1 Data = 0
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PARALLEL LOAD SHIFT REGISTER
Outputs here. Order= A B C D Parallel data inputs (Active LOW) Recirculating lines: Pass data from FFD to FFA on each clock pulse. Clock input- H-to-L Note the recirculating lines. Clear input- Active LOW Note the use of J-K FFs. Clock (CLK) inputs wired in parallel. Clear (CLR) input activated with LOW. Parallel load inputs (A,B,C,D) are active LOW.
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RECIRCULATING SHIFT REGISTER
Clock pulse 8 Clear input= 1 Parallel data inputs= only B active Clock pulse 7 Clear input= 0 Parallel data inputs= all inactive Clock pulse 1 Clear input= 0 Parallel data inputs= only D activated Clock pulse 6 Clear input= 1 Parallel data inputs= all inactive Clock pulse 3 Clear input= 1 Parallel data inputs= all inactive Clock pulse 5 Clear input= 1 Parallel data inputs= all inactive Clock pulse 2 Clear input= 1 Parallel data inputs= C & D activated Clock pulse 4 Clear input= 1 Parallel data inputs= all inactive
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UNIVERSAL SHIFT REGISTER IC
Outputs here Clear input active LOW Serial data Right input used during Serial Load Right mode of operation Parallel data inputs Order: A, B, C, D during Parallel loading Serial data Left input used during Serial Load Left mode of operation Clock input L-to-H triggering Mode Controls: Hold Parallel load Shift right Shift left 74194 Universal 4-bit Shift Register IC. Modes of operation: Hold, Parallel load, Shift right & Shift left. An active LOW Clear (CLR) input overrides all others.
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USING THE 74194 SHIFT REGISTER IC
CLR = 1 Serial R = X Parallel Load= Serial L = X Clock pulse 6 (L-to-H) S0= 1 S1= 1 CLR = 1 Serial R = X Parallel Load= Serial L = 1 Clock pulse 7 (L-to-H) S0= 0 S1= 1 CLR = 1 Serial R = X Parallel Load= Serial L = 0 Clock pulse 8 (L-to-H) S0= 0 S1= 1 CLR = 1 Serial R = 0 Parallel Load= Serial L = X Clock pulse 4 (L-to-H) S0= 0 S1= 0 CLR = 1 Serial R = X Parallel Load= Serial L = X Clock pulse 1 (L-to-H) S0= 1 S1= 1 CLR = 0 Serial R = 0 Parallel Load= Serial L = X Clock pulse 5 (L-to-H) S0= 1 S1= 1 CLR = 1 Serial R = 0 Parallel Load= Serial L = X Clock pulse 2 (L-to-H) S0= 1 S1= 0 CLR = 1 Serial R = 0 Parallel Load= Serial L = X Clock pulse 3 (L-to-H) S0= 1 S1= 0 X = Irrelevant
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TEST ? ? ? ? A: Universal A: Clear, 0 0 0 0 A: Parallel load, 0 1 0 0
QUESTION #1 The IC could be described as a 4-bit (shift right, universal) shift register. QUESTION #3 What is the mode of operation during and the output of the shift register after pulse 2? QUESTION #2 What is the mode of operation during and the output of the shift register after pulse 1? QUESTION #4- What is the mode of operation during and the output of the shift register after pulse 3? QUESTION #5 What is the mode of operation during and the output of the shift register after pulse 4? QUESTION #7 What is the mode of operation during and the output of the shift register after pulse 6? QUESTION #6 What is the mode of operation during and the output of the shift register after pulse 5? A: Universal A: Clear, A: Parallel load, A: Shift right, A: Shift left, A: Hold, A: Shift left, ? ? ? ? CLR = 1 Serial R = 0 Parallel Load= Serial L = X Clock pulse 2 (L-to-H) S0= 1 S1= 1 CLR = 1 Serial R = X Parallel Load= Serial L = 1 Clock pulse 6 (L-to-H) S0= 0 S1= 1 CLR = 1 Serial R = 0 Parallel Load= Serial L = X Clock pulse 4 (L-to-H) S0= 0 S1= 0 CLR = 1 Serial R = X Parallel Load= Serial L = 1 Clock pulse 5 (L-to-H) S0= 0 S1= 1 CLR = 0 Serial R = X Parallel Load= Serial L = X Clock pulse 1 (L-to-H) S0= 1 S1= 1 CLR = 1 Serial R = 0 Parallel Load= Serial L = X Clock pulse 3 (L-to-H) S0= 1 S1= 0
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SIMPLE TROUBLESHOOTING HINTS
Feel top of IC to determine if it is hot Look for broken connections, signs of excessive heat Smell for overheating Check power source Trace path of logic through circuit Know the normal operation of the circuit
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