1. ZCU102 (Xilinx Zynq Ultrascale+
Application Scenario
MIPI/LVDS Output
Platform Board
FPGA to receive
MIPI/LVDS data
1. Does Xilinx provides the driver support or API Support in Labview which can be called in Labview for configuring FPGA ( to make it as SPI master and to do other SPI communication) ???
2. Does Xilinx provides the driver support or API Support in Labview for accessing MIPI/LVDS data from FPGA back to Labview for post processing ????
SPI Slave 1
SPI
ZCU102 (Xilinx Zynq Ultrascale+
MPSoC) Evaluation Kit
SPI Slave 2
SPI
USB 3.0 /Ethernet?
PC GUI
(Labview)