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EEE4176 Applications of Digital Signal Processing

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1 EEE4176 Applications of Digital Signal Processing
Fall 2011 Assistant Prof. Yangmo Yoo Dept. of Electronic Engineering Sogang University

2 Lecture 3: Multirate Signal Processing

3 Summary M-fold Decimation:

4 Summary L-fold Expansion: F1 L*F1 F1/M

5 Summary x2(n)

6 Summary Efficient structures for decimation and interpolation filters
Decimation filter: M=2 Direct implementation Polyphase implementation: Type 1 N+1 multiplications and N additions at Fs (N+1) MPUs and N APUs During the odd clock cycles, resting Fs Fs/2 n0 n1 N+1=n0+n1+2 multiplications and N additions at Fs/2 = (N+1)/2 multiplications and N/2 additions at Fs (N+1)/2 MPUs and N/2 APUs Due to noble identity

7 Summary Efficient structures for decimation and interpolation filters
Interpolation filter: L=2 Direct implementation Polyphase implementation: Type 2 Fs 2Fs 2 2(N+1) MPUs and 2N APUs Half of the samples are zero (N+1) MPUs and (N-1) APUs

8 Summary Ex: M=3, L=2 ; M/L = 1.5 M L H(z)

9 Summary Ex: M=3, L=2 ; M/L = 1.5

10 Lecture 3: Multistage Signal Processing
10

11 Multistage Implementations
Multistage schemes Lower rate operation Lower computation amount: Simple filter spec Multistage decimation 11

12 Multistage Implementations
12

13 Multistage Implementations
Multistage Expansion (or interpolation) 13

14 Multistage Implementations
Motivation of multistage implementation Length of a linear phase FIR filter Multistage implementation helps to reduce the overall filter length 14

15 Multistage Implementations
IFIR (Interpolated FIR) approach Model filter H(z) Image suppressor 15

16 Multistage Implementations
IFIR (Interpolated FIR) approach Optimum # of stages ? Neuvo. Et al. [1984] 16

17 Multistage Implementations
Multistage design of decimation filter Design example 4.4.2 17

18 Multistage Implementations
Multistage design of decimation filter Design example 4.4.2 symmetric as M1 18

19 Multistage Implementations
Multistage design of decimation filter 19

20 Multistage Implementations
Multistage design of interpolator 20

21 Applications of Multirate systems
Digital audio A/D D/A Fractional sampling rate conversion Studio: 48KHz CD mastering: 44.1KHz Broadcasting: 32KHz 48K K : L=441, M=480 21

22 Applications of Multirate systems
Subband coding of speech and image signals DPCM, ADPCK: Jayant and Noll, 1984 Image compression: subband coding Woods and O’Neil, 1986 Smith and Eddins, 1990 Woods, 1990 Music signals: DCC Veldhuis, et al., 1989 pp , ICASSP, 1991 Fettweis, et al., 1990 22

23 Applications of Multirate systems
Analog voice privacy systems Multirate adaptive filters Transmultiplexers Shynk [1992] Time domain multiplexing Demultiplexing 23

24 Applications of Multirate systems
Transmultiplexer structure 24

25 Applications of Multirate systems
Transmultiplexer structure 25

26 Lecture 3: Supplements Multistage Conversion
Dr. Mark Fowler from SUNY, EE512

27 Motivation for Multistage Schemes

28 Trick to Get Efficiency from Multistage

29 Why for a 2-Stage Case?

30 Why for a 2-Stage Case?

31 Why for a 2-Stage Case?

32 Design Requirements

33 Example: How 2-Stage Reduces Computation

34 Example: Single-Stage Method

35 Double-Stage Method

36 Comments on Multistage Method

37 Application: Multistage Rate Change


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