1. Low-Power SRAM Using 0.6 um Technology
Andrew Ashworth
Jonathan Chen
Matt Williams

2. Introduction Metrics: Power(mW), Delay(ns), Area(mm2) Low Power SRAM:
(total power)2 * delay * area
SRAM size of 1 Mb
Word size of 32 bits
One read or one write access per cycle

3. Clock
Two-phase non-overlapping clock generator
CLK
CLK1
CLK2

4. Array Architecture
Block Selector, Transmission Gates, and Positive Edge Triggered Register
5:32
<4:7>
<0:3>
<8:11>
<12:15>
<16:19>
<20:23>
<24:27>
<28:31> 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
A14A13A12A11A10
Word-line Enable Bit

5. Enable bit from 5:32 Decoder
Block Architecture
Hierarchical word line with divided bit line
To local word-line
Numbers shown by inverters are ratios relative to minimum sized inverter 1 4
A9A8A7A6
A5A4A3A2
Enable bit from 5:32 Decoder
4:16
Enable bit
Local BL
Local BLB
Local WL
Transistors use 0.5 um technology. Sizes shown represent widths of devices.
1.5um
4.5um

6. Block Architecture Continued
from Figure 5
Global Bit-Line
Global Bit-Line Bar
Divided bit line approach with 16 bit cells per local bit line

7. Drowsy Cache
An extra 6t bit cell holds whether block is asleep or awake and selects corresponding Vdd
Requires extra dc-dc converters on chip

8. Layout Horizontal bit cell to maintain square block
We should have learned SKILL

9. Challenges
Drivers
Clock generation – iterated through 3 designs before finally settling on a pulsed NOR design.
Designing sense amp enable driver

10. Simulation
Extracted parasitic capacitances from layout to build accurate array model
Simulated model of one block to represent entire array
Began with worst case 50C and SS to find stable clock

11. Results
The SRAM correctly performed a write followed by a read at all process corners, and temperatures
As VDD is scaled down, leakage power decreases by orders of magnitude. We have no reliable numbers as power simulations returned unrealistic results for 5V VDD

12. Results II

13. Metric Total Size: about 500mm^2 Average Power: about 9mW
Delay: about 35ns
Total Metric: million

14. Questions?