1. CTA general meeting, Chicago, 28 May-2 Jun, 2013
Development of the Photomultiplier-Tube Readout System for the CTA Large Size Telescope
H.Kubo1, R.Paoletti2, Y.Awane1, A.Bamba3, M.Barcelo4, J.A.Barrio5, O.Blanch4, J.Boix4, C.Delgado6, D.Fink7, D.Gascon8, S.Gunji9,　R.Hagiwara9, Y.Hanabata10, K.Hatanaka1, M.Hayashida10, M.Ikeno11, S.Kabuki12, H.Katagiri13, J.Kataoka14, Y.Konno1, S.Koyama15, T.Kishimoto1, J.Kushida16, G.Martínez6, S.Masuda1, J.M.Miranda17, R.Mirzoyan7, T.Mizuno18,
T.Nagayoshi15, D.Nakajima7, T.Nakamori9, H.Ohoka10, A.Okumura19, R.Orito20, T.Saito1,
A.Sanuy8, H.Sasaki21, M.Sawada3, T.Schweizer7, R.Sugawara20, K.-H.Sulanke22, H.Tajima19,
M.Tanaka11, S.Tanaka13, L.A.Tejedor5, Y.Terada15, M.Teshima7,10, F.Tokanai9, Y.Tsuchiya1,
T.Uchida11, H.Ueno15, K.Umehara13, T.Yamamoto21 for the CTA Consortium23.
We have developed a prototype of the PMT readout system for the Cherenkov Telescope Array (CTA) Large Size Telescope (LST). PMT signals from a 7-PMT cluster are amplified, and then the waveforms are recorded at a sampling rate of ~GHz using the Domino Ring Sampler DRS4, an analog memory ASIC developed at PSI. The charges, stored in capacitors of the DRS4 with 4096 capacitors per PMT, are digitized by an external ADC and then transmitted via FPGA-based Gigabit Ethernet. A prototype named Dragon has been developed that has successfully sampled PMT signals at a rate of 2 GHz, and generated single photoelectron spectra.
1Kyoto University, 2Università di Siena, and INFN Pisa, 3Aoyama Gakuin University, 4IFAE, 5GAE-UCM, 6CIEMAT, 7MPI für Physik, 8ICC-UB, 9Yamagata University, 10ICRR, The University of Tokyo, 11IPNS, KEK, 12Dept. of Radiation Oncology, Tokai University, 13Ibaraki University, 14Waseda University, 15Saitama University, 16Dept. of Physics, Tokai University, 17UCM-ELEC, 18Hiroshima University, 19STE, Nagoya University,
20The University of Tokushima, 21Konan University, 22DESY, 23see for full author & affiliation list,
1. Overview of Readout System
The Cherenkov Telescope Array (CTA) [1] is a next-generation VHE g-ray observatory with a factor of 10 improvement in sensitivity in the 100 GeV to 10 TeV range and extension to energies <100 GeV and >100 TeV. The large size telescopes (LST) with 23 m dishes [2] are located at the center of the array. Several thousand PMTs and their readout systems are arranged on the focal plane of each LST, with one readout system per 7-PMT cluster.
We have so far developed three versions of prototypes of the PMT readout system for the CTA LST [3], using the DRS4 analog memory chip [4]. A third prototype version was developed to be downsized and reduce the cost for mass production. In this paper, we report the design and performance of the third version of the prototype.
The third version (Fig. 1) consists of 7 PMTs (Hamamatsu R [5], head-on type, 38 mm diameter, super-bialkali photocathode), Cockcroft-Walton circuit boards for high voltage supply to the PMT, preamplifier boards, a slow control board [6], and a DRS4 readout board. Total power consumption of the whole system (Fig. 1) is ~2 W per readout channel.
3. DRS4 Readout Board
The DRS4 readout board (Fig. 3) has main amplifiers (Fig. 4), eight DRS4 chips (Fig. 5) for readout of high and low gain channels per PMT, ADCs for digitizing the signals from the DRS4 at a sampling frequency of 33 MHz, a DAC to control the DRS4, an FPGA, an 18Mbit SRAM, a Gigabit Ethernet transceiver (data is transmitted using SiTCP shown in Fig. 6), and a data I/O connector to the backplane. A Xilinx Vertex-4 FPGA was adopted in the version 2. In the version 3, a Xilinx Spartan-6 FPGA is used to reduce the cost for mass production. In addition, a digital level 0 (L0) trigger mezzanine [3] or analog level 0 (L0) and 1 (L1) trigger mezzanines [9] are mounted on the DRS4 board. Boards for distributing the L0/L1 trigger are placed at the backplane of the DRS4 board [9]. Figure 7 shows a prototype with three clusters of PMTs and their readout boards, which was constructed to develop a multicluster trigger [9].
A stereo trigger with the LST array is generated by coincidence of local triggers from the LST telescopes while a sampling by the DRS4 chip is running. This method requires a sampling depth of more than 3.5 ms. In each DRS4 chip, four channels are cascaded, leading to a sampling depth of 4096 (=4 ms at 1 GS/s).
High gain
Low gain
Gain
Bandwidth
-3dB
Dynamic Range
(nph)
High
260 60
Low
190
2500
Board size: 14 cm×30 cm
Fig. 3: DRS4 readout board
Fig. 4: Main amplifiers
9 ch.×(1024 switched capacitors)
Sampling speed: 700 MHz up to 5 GHz
950 MHz bandwidth
140mW (typ.) at 2GS/s (17.5 mW/ch)
Fig. 5: Analog Memory DRS4 chip [4]
Circuit size (~3000 slices)
in FPGA allows implementation with user circuits on a single FPGA.
Ethernet
PHY
FPGA
Fig. 7: Three-cluster camera
High throughput of ~950 Mbps
Fig. 6: FPGA-based Gigabit-Ethernet SiTCP [8]
4. Performance of Readout System Coupled to PMT
Figure 8 shows a pulse shape of the high gain PMT channel with a gain of 5×104, which was measured with a UV laser and the DRS4 readout system. The PMT signal having a width of ~3 ns (FWHM) and a height corresponding to ~3 photoelectrons was successfully digitized. Measured dead time for readout of 60 cells in the DRS4 chip is 0.9% and 5.4% at 1 kHz and 7 kHz, respectively. Figure 9 shows a single photoelectron (SPE) spectrum of the high gain PMT channel, which was measured with
Dragon and an LED at a
sampling rate of 2 GS/s.
The SPE peak is clearly seen.
The signal to noise ratio,
defined as (mean-SPE –
mean-pedestal)/
pedestal r.m.s. is 3.5.
Fig. 8: Pulse shape of the PMT signal measured with the readout system
2 GS/s
PMT Gain= 4.5x104
Fig. 1: 7-PMT cluster and readout system
2. Preamplifier Board
A signal from the PMT is amplified by a preamplifier, and fed to the DRS4 readout board. A commercial preamplifier, Mini-circuits LEE-39+, is used in the current Dragon (Fig. 2 left). A preamplifier board with an ASIC designed for CTA, PACTA [7], has been recently developed (Fig. 2 right) and will be used in the next Dragon.
Fig. 9: Single photoelectron spectrum
ACKNOWLEDGEMENTs
We gratefully acknowledge support from the agencies and organisations listed in this page:
References
[1] The CTA Consortium, Experimental Astronomy 32 (2010)
; Astroparticle Physics 43 (2013) 1-356
[2] O.Blanch et al., ICRC2013, ID-776
[3] H.Kubo et al., proceeding of ICRC (2011)
[4] S. Ritt, R. Dinapoli, U. Hartmann, NIMA 623 (2010)
[5] T.Toyama et al., ICRC2013, ID-684
[6] R. Orito et al., proceeding of ICRC (2011)
[7] A. Sanuy et al., JINST 7 (2012) C01100
[8] T. Uchida, IEEE TNS 55 (2008)
[9] J.A.Barrio et al., ICRC2013, ID-396
Fig. 2: Preamplifier board