1. Sassan Tabatabaei, Freddy Ben-Zeev and Michael Lee
Jitter Generation and Measurement for Test of Multi-gigabit Serial Interconnects
Sassan Tabatabaei, Freddy Ben-Zeev and Michael Lee

2. Purpose RJ, DDJ, and PJ injection for receiver test
Use delay line modulation
Programmable DDJ
Jitter measurement methodology with continuous TIA (CTIA)
Markerless measurement
Objectives:
To inject jitter in data streams for jitter measurement verification and receiver testing with:
Programmable RJ
Programmable high and low frequency PJ
Programmable DDJ
Discuss continuous time interval analyzers and how they can measure jitter without any marker signal
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

3. Outline Jitter injection issues Programmable jitter injection
Continuous time interval analyzer (CTIA)
Markerless and fast RJ/DDJ measurement methodologies
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

4. Typical setup (e.g., XAUI)
Jitter Injection
Typical setup (e.g., XAUI)
Typical jitter injection setup includes:
Pj injection through PM/FM modulation of RJ generators (limited in frequency and range)
RJ through amplitude superposition (sensitive to rise/fall time and glitches)
DDJ: fixed application-specific filters
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

5. Jitter Injection Limited PJ frequency range
Large RJ may cause spurious edges
DDJ programmability very limited
Requires filter tuning
Typically not portable across applications with different bit rates
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

6. Jitter Injection Programmable setup NEW Info Proposed method.
Use delay line phase modulation in a phase-locked system
NEW
Info
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

7. DDJ Injection DDJ injection setup ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

8. Traditional Time Interval Analyzer (TIA)
Operation Principles
Traditional TIA architectures
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

9. Traditional Time Interval Analyzer (TIA)
Operation Principles
Traditional TIA architectures with marker signal
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

10. Continuous Time Interval Analyzer (CTIA)
Operation Principles
Continuous TIA operation
Tracking edge timing relative to a common reference continuously
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

11. Continuous Time Interval Analyzer (CTIA)
Operation Principles
CTIA does not require any marker!
TO demonstrate examples in RJ/DDJ measurement methods.
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

12. Jitter Measurement Definitions Random jitter (RJ)
Uncorrelated to Known sources
Gaussian distribution
Data-dependent jitter (DDJ)
Inter-symbol interference
Duty-cycle distortion
Reflections
Definitions
Objectives:
To inject jitter in data streams for jitter measurement verification and receiver testing with:
Programmable RJ
Programmable high and low frequency PJ
Programmable DDJ
Discuss continuous time interval analyzers and how they can measure jitter without any marker signal
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

13. Jitter Measurement Definitions Time Interval Error (TIE) function:
Ideal signal
Real signal
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

14. RJ Measurement
Data signal with a repeating pattern (K28.5 in this example)
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

15. RJ Measurement TIE measurement for the same edge of the pattern
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

16. RJ Measurement Sampling the same pattern edge: DDJ deconvolution
Uniform sampling of edge deviation sequence. Good for FFT.
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

17. RJ Measurement TIE TIE FFT Time (s) Normalized frequency
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
-100
-50 50
100
Time (s)
TIE sequence (ps)
TIE
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0 10 -4 -2 2
Normalized frequency
Scaled FFT (ps)
TIE FFT
FFT deconvolves PJ
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

18. RJ Measurement Frequency domain deconvolution
Insensitive to PJ and DDJ
Predictable Repeatability
3% for 8192 samples
No external marker required
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

19. DDJ Measurement
DDJ: set event counter to walk over pattern edges multiple times (virtual marker!).
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

20. DDJ Measurement Histogram for each pattern edge Edge 5 Edge 4 Edge 2
-40 40 80
120 20 60
100
TIE (ps)
Bin population
Histogram for each pattern edge
Edge 1
Edge 2
Edge 3
Edge 4
Edge 5
Separate TIE for pattern edges. Measure DDJ.
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

21. DDJ Measurement Time domain deconvolution
Per-edge time shift measurement
Insensitive to RJ and PJ (averaging)
No external marker required
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

22. Example: Sinusoidal DDJ
DDJ Injection
Example: Sinusoidal DDJ 15
CTIA (GT 4000)
Scope (86100C) 10 5
Edge shift (ps)
Example of DDJ injection performance. -5
-10 20 40 60 80
100
120
Transition bit number
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

23. Measurement Results (RJ)
Accuracy 20 22 24 26 28 30 32 3 4 6 8 10
RJ (ps)
CTIA
TDS7404
Linear fit
-0.5
0.5 D
Noise generator attenuation (db)
RJ is accurate within 0.5ps.
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

24. Measurement Results (RJ)
Immunity to DDJ
2.5Gbps, PRBS7 pattern 20 25 30 35 40
5.4
5.5
5.6
5.7
5.8
RJ (ps)
Injected DDJ (ps)
RJ is immune (insensitive) to variations of DDJ. Maintain accuracy for different jitter profiles.
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

25. Measurement Results (DDJ)
Accuracy 50 45 40
PRBS7 35 30
Measured peak-to-peak DDJ (ps)
K28.5 25
DDJ accuracy (within 3ps)
CTIA 20
ET-DSO 15 10 20 40 60 80
100
120
140
160
AWG amplitude (mV)
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

26. Measurement Results (DDJ)
Immunity to RJ and PJ 2 4 6 8 10 12 32 33 34 35
Measured peak-to-peak DDJ (ps)
Injected RMS RJ (ps) 50
100 30 31 32 33 34
Injected PJ (ps)
Measured peak-to-peak DDJ (ps)
DDJ injection and measurements immune to RJ and PJ.
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects

27. Conclusions
Delay line modulation with locked AWG provide flexible and programmable jitter injection method.
No need for application-specific DDJ filters
CTIA: markerless jitter separation
Virtual marker
Accurate
Fast:
No marker generation time
Compact data volume
Completely programmable jitter injection method including DDJ introduced.
CTIA perform jitter decomposition without any marker signal.
ITC 2004
Jitter Models & Measurement for High-Speed Interconnects