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Sequential logic design principles
Chapter 7 Sequential logic design principles Memory devices : Latch and Flip-flop Sequential logic : Pipeline and FSM Analysis and Synthesis for FSM
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States analyze examples
Design an “1s-counting machine : The output Z should be 1 if the number of 1 inputs on X and Y since reset is a multiple of 4, and 0 otherwise.
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States analyze examples
Step 1: set up enough state with different meaning ; State name state meaning S initial or four 1s, Z=1; S one 1s, Z=0; S two 1s, Z=0; S three 1s, Z=0;
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States analyze examples
Step 2: set up the state diagram and the state table ; S* XY Z State meaning 00 01 11 10 S0 S1 S2 1 Zero 1s S3 One 1s Two 1s Three 1s
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States analyze examples
Step 3: get the transition table according to the state coding;
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States analyze examples
Design a “simple state machine ”: The output Z should be 1 if : A had the same value at each of the two previous clock ticks or B is 1 and last Z was 1.
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States analyze examples
Step 1: set up enough state with different meaning ; State name state meaning S initial state; S A=0; S A=1; S A=00; Z=1; S A=11; Z=1; S A=01; Z=1; S A=01; Z=0; S A=10; Z=1; S A=10; Z=0;
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States analyze examples
Step 2: state / output table
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States analyze examples
Step 3: state minimization Equivalent state: the current output is the same; the transition states is the same on same inputs; The equivalent states should be replaced by a single state !
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States analyze examples
Step 3: state minimization Equivalent states pairs: S5—S4 S6—S2 S7—S3 S8—S1 S* AB Z 00 01 11 10 S0 S1 S2 S3 S4 1 The minimal state/output table
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States analyze examples
Step 3: state minimization The minimal state diagram
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States analyze examples
Step 4: state assignment Use decomposed assignment, output is Q2;
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States analyze examples
Step 4: transition table and minimal cost design
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Transition list and minimization
Step 4: transition list and minimal cost design
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Transition list and minimization
Step 4: transition list and minimal cost design
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