1. Errors due to process variations
Deterministic error
Characterized a priori
Over etching, vicinity effects, …
A priori unknown
Gradient errors due to thermal, potential, stress, …
Random errors
Intrinsic randomness in materials
Randomness in processes
Randomness during operation

3. Various Capacitor Errors

4. Common error reduction techniques
Use large area to reduce random error
Common Centroid layout to reduce linear gradient errors
Use unit element arrays
Interdigitize for matching
Use of symmetry of photolithographic invariance
Controlled edge or corner effects
Dummy device for similar vicinity
Guard rings for isolation
Careful floor planning

5. Gradient errors:
Linear gradient
Higher order gradient
Unknown magnitude and direction
Common centroid cancels linear gradient errors, but not nonlinear gradient errors nor local random errors

6. Edge effects 
better

11. Capacitor layout example

12. Are there any thing else you can improve?
Is there full symmetry between C1 and C2?

14. Resistor layout example

15. OK for really non-critical resistors. Accuracy is quite poor.
Should use unit cell arrays for improved accuracy.

16. Positives: use of dummy, use of unit cells, intedigitized, outfold jumps
Negatives: fold-in jumps, centroids not co-incidental
Improvements: ???

17. Transistor layout example

19. Layout of a differential pair
Which layout is a better implementation of the differential pair?
(b) or (c) or (d)?

20. Tilted implant beam causes asymmetry
Aligned gate
Parallel gate
PLI?
PLI

21. Parallel gate can be PLI
Aligned gate can benefit from symmetry
Add dummy metal
metal
Dummy makes it symmetric
Asymmetric

22. Can have both gate alignment and symmetry
But still suffers from gradient errors

23. This pattern cancels gradientM2 M1 M2 M1
Can it be made more compact?

24. Here is a simpler way

27. Does the layout of M1 and M2 have common centroids?
Does the layout have symmetry?
Does it have PLI?

28. Donut shaped MOS to reduce CD and Cgd

29. Avoiding the Antenna Effect
Long metal acts as antenna to collect charges that may destroy gates:
Break the antenna by going to a different layer:

30. Reference distribution
Converted Iref to Vref to be shared
Vulnerable to voltage drops in ground lines

31. Reference distribution
Distribute Iref over longer distances is more robust

32. Routing long interconnects
Parasitic capacitors or even inductors between parallel metal lines
Parasitic caps between crossing metal lines

33. Differential signaling to reduce parasitic coupling effects

34. Shield or guard critical lines
Larger spacing reduces coupling

35. Example shielding scheme
Critical signals shielded

36. Substrate Coupling Distributed substrate network model
Digital activities couple
to analog part through
substrate coupling

37. Nearby devices affect each other through effect on Vth change
Effect is worse at very high speed
Example effect:

38. Techniques for reducing couple
Use differential circuit
Distribute digital signals in complementary
Critical circuit in “quiet area”, far away from noisy (digital) circuit
Devices in a well are less sensitive
Use trenches for isolation
Critical circuit in guard ring
Critical operations in “quiet time”

39. Example use of guard ring

41. H-shape distribution
Analog cell
array
Other circuit

46. Introduction
Theorem: If only linear gradient effects are present, then the mismatch of a parameter f of two elements will vanish if a common centroid layout is used.
Common Centroid Layout
Gradient
Direction

47. Introduction A B B A Common Centroid Layout with Nonlinear Gradient
Hypothesis of common-centroid theorem are not satisfied and

48. Introduction A B B A
Common Centroid Layout with Nonlinear Gradient
Are there any simple layout strategies that will also cancel nonlinear gradients?

49. Objective
Develop a layout strategy for canceling mismatch of parameters for two matching-critical elements when nonlinear gradients of higher orders are present

50. Center-Symmetric Patterns
Definition: A layout pattern Pn of two devices generated by the following recursive algorithm is called an n-th order center symmetric pattern.
Start with a layout for device A and B, with A’s unit cells labeled 1 and B’s unit cells labeled -1. This is the zeor-th order pattern P0.
Assume pattern Pk has been generated
If k<n, create pattern Pk+1 by
Rotating pattern Pk by 180o around any point external to pattern Pk
Multiplying all elements in the rotated pattern by (-1)k
Define pattern Pk+1 to be the union of pattern Pk and the rotated pattern from b)

51. Center-Symmetric Pattern ExampleB 1 -1 P0
180deg -1 1
Rotating point P1

52. Center-Symmetric Pattern Example1 -1 -1 1
Rotation
Point
Common Centroid
Layout 1 -1
k=1 -1 1
Rotated Pattern
k=2

53. Center-Symmetric Pattern Example1 -1 1 -1 -1 1 -1 1 1 -1 -1 1 -1 1 1 -1
Rotated Pattern
constrained complimented pattern
k=2

54. Center-Symmetric Pattern Example1 -1 1 -1 -1 1 -1 1
Pattern P1 -1 1 1 -1
Pattern P2

55. Center-Symmetric Pattern Example1 -1 1 -1 1 -1 -1 1 -1 1 1 -1
Pattern P2
Rotated Pattern
k=3

56. Center-Symmetric Pattern Example
k=3 1 -1 1 -1
constrained complimented pattern
(no change since k is odd)

57. Center-Symmetric Pattern Example1 -1 -1 1 1 -1 1 -1 -1 1
Pattern P3

58. 1 2 3 4
1st order 5 2 8 3 1 6 7 4
2nd order 7 12 1 13 9 5 11 15 3 14 2 6 4 10 8 16
4th order
5th order
3rd order

60. Center-Symmetric Patterns
Many different center-symmetric layouts can be easily generated
Different starting common-centroid circuits and different external rotation points will generate different structures

61. Property of Center-Symmetric Networks
Theorem : A parameter f of a layout pattern of two elements that is center-symmetric of order n is insensitive to the kth-order gradients for

62. Gradient Modeling 1st order gradient Up to nth order gradient
Let (x0,y0) be any reference point in the neighborhood of the matching critical devices
1st order gradient
Up to nth order gradient

63. Gradient Effect
Let (xA,yA) be any point in the neighborhood of the matching critical region
It can be shown that fn(x,y) can be written as
Moving the center of the nth order gradient will only introduce lower order components
This argument can be repeated for gradient components of orders n-1, n-2, … 1

64. Mismatch Systematic mismatch Random mismatch Gradient error
Can be reduced by increasing area

65. Nth order circular symmetry
(x0,y0)
Divided into 2N Cells
Uniformly distributed around a circle

66. Nth order circular symmetry
1-1 Matching from linear to Nth-order Gradient
Rotation Invariant
N elements matching A B

67. Hexagon tessellation High Area Efficiency Easy to Extend
Cancel up to 2nd gradient
Easy to Extend
Honeycomb Structure
Tight
Uniform A B

68. Simulation Results Totally 5 patterns are simulated 1st order
2nd order
4th order
5th order
3rd order

69. Simulation Results Totally 5 patterns are simulated 1st order
2nd order
4th order
5th order
3rd order

70. Highest Order of Gradient Effect
Simulation Results
Setup: Same total device area are assigned.
Large gradient effects are artificially generated.
Random variations are neglected.
Mismatch (%)
Highest Order of Gradient Effect
1st
2nd
3rd
4th
5th
2.77
5.22
7.43
10.39
0.24
0.87
1.70
0.01
0.068
0.0023
Pattern’s order

71. Test structure <0.002% systematic mismatch
3rd order central symmetry
<0.04% systematic mismatch
2nd order central symmetry

72. Measurement results

73. Measurement results

74. Matching performance Conference papers: Journal papers:
C. He, et al., ‘Nth order circular symmetry pattern and hexagonal tessellation: two new layout techniques canceling nonlinear gradient,’ ISCAS 2004
X. Dai, C. He, et al., ’an Nth order central symmetrical layout pattern for nonlinear gradients cancellation,’ ISCAS 2005
Journal papers:
C. He, et al., ‘New layout strategies with improved matching performance,’ Analog integrated circuits and signal processing, vol. 49 , issue 3, pp ,2006