1. Sitarambhai Naranjibhai Patel Institute of Technology and Research Centre.

2. Prepared By: Branch: Electronics and Communication. Semester: 3
Student’s name:
PEN Number:
Patel Pratik
Sharma Rohit

3. SUBJECT: ELECTRONIC DEVICES AND CIRCUITS. TOPIC: TRANSISTOR BIASING.

4. Contents To Be Covered:
1)VOLTAGE DIVIDER BIASING.
2)ACCURATE VOLTAGE DIVIDE BIAS.
3)VDB LOAD LINE.
4)VDB Q-POINT.
5)OTHER TYPES OF BIASING.

5. Figure 1.1: Voltage divider Biasing.

6. Assume that I2 > 10IB.
Assume that IE (or hFE >> 1). Then

7. 2.1 Accurate Voltage-Divider Bias:
For this circuit we will not take the input resistance into consideration. Essentially we are determining the voltage across R2(VB) by the proportional method.
VB = (R2/R1 + R2)VCC
Figure 2.1: Accurate VDB

8. We now take the known base voltage and subtract VBE to find out what is dropped across RE.
Knowing the voltage across RE we can apply Ohm’s law to determine the current in the collector-emitter side of the circuit.
Remember the current in the base-emitter circuit is much smaller, so much in fact we can for all practical purposes we say that IE approximately equals IC.
IE≈ IC

9. 2.2 Analysis of Voltage-Divider Bias Circuit.
Figure2.2: Analysis of VDB Circuits.

10. 2.2 Analysis of voltage divider bias circuit:
Total resistance from base to ground is:
A voltage divider is formed by R1 and resistance from base to ground in parallel with R2.
If DC RE >>R2, (at least ten times greater), then the formula simplifies to

11. Determine emitter voltage VE.
VE=VB – VBE
Using Ohm’s Law, find emitter current IE.
IE = VE / RE
All the other circuit values,
IC ≈ IE
VC = VCC – ICRC
To find VCE, apply KVL:
VCC – ICRC – IERE – VCE =0.
Since IC ≈ IE,
VCE ≈ VCC – IC (RC + RE)

12. 3.1 VDB Load Line :
Figure3.1: VDB Load Line.

14. 4. VDB Q-point:
DC load line significance is that regardless of the behavior of the transistor, the collector current IC and the collector-emitter voltage VCE must always lie on the load line, depends ONLY on the VCC, RC and RE .

15. Figure4: VDB Q-point.

16. The dc load line is a graph that represents all the possible combinations of IC and VCE for a given amplifier.
For every possible value of IC, and amplifier will have a corresponding value of VCE.
It must be true at the same time as the transistor characteristic.
Solve two condition using simultaneous equation , graphically as Q-point.

17. 5.1 Other Transistor Biasing Circuits:
1) Emitter-bias circuits.
2) Feedback-bias circuits:
Feedback Circuits can be classified as:
-Collector-feedback bias.
-Emitter-feedback bias.

18. Assume that the transistor operation is in active region.
5.2 Emitter bias:
Assume that the transistor operation is in active region.
Figure 5.2: Emitter Bias

19. 5.3 Collector-feedback bias:
Figure5.3: Collector feedback bias.

20. 5.5 Emitter-feedback bias:
Figure 5.5: Emitter Feedback Bias.

21. THANK YOU !