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Alternative FEE electronics for FIT.

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Presentation on theme: "Alternative FEE electronics for FIT."— Presentation transcript:

1 Alternative FEE electronics for FIT.
Evgeny Usenko, INR RAS

2 Alternative LE, CFD, TOT FEE - structure.
Analog part DC coupled structure, Offset & temperature cancellation, Variable gain amplification stage, 15ns deviation width TOT solution. Digital part Advanced FPGA – Lattice license, Signals integrity, Internal FPGA SPI protocol for full analog part control, Internal FPGA test generator and test signal distributions, Internal FPGA DAC’s for fine TOT and CFD and any parts controlling Interface part Electronics and optical combine OR&Vertex solution, Standard FEE to TRB3 digital communications, Common Power Supply solution for FEE+TRB. Two by one DAQ and Slow Control board

3 LE, CFD, TOT front-end structure.
Common 32-channel FEE board for combining analog and digital solution Analog 32-channel prototype FPGA Lattice Read-out leading trailing TOT discrim. trailing LE+TOT LE Signal logic: combining, stretchers, other, signals distributing. Leading edge discrim. TOT lead Zero+TOT Zero Crossing zero discrim. Interface logic: SPI controller, DAC’s, Test generator, analog controlling. Control lines SPI

4 CFD&TOT simulation for 25ns bunch. DC coupled structure.
CFD and TOT method simulation for 25ns bunch versus recovery time

5 TOT width vs. amplitude and accuracy.
HADES TRB TOF AddOn charge vs. width accuracy. Average error is <0.4% on (2-200)xThreshold range Shapers probes

6 TOT shaper simulation for 25ns pulse distance. DC coupled.
Amplitude 6V Amplitude 8V and 20mV

7 Optical decision for FIT fast trigger.
ALICE R&D optical timing fan-out experience at 2004. Use optical fan-out as fan-in for realize OR function. Probe window of timing resolution 12,5ps (sigma)

8 Summary. Alternative Front-end electronics eliminates ADС.
2. Simplified FEE channel include just CFD, LE and TOT functions. Simple switching to different amplitude range mode by use Leading and Trailing edges TOT options Separation for FEE and Read-out. Fully DC-coupled schematic structure for provide 25ns and dynamic range FIT requirements. Use electronic-optical decision for fast trigger solution. The software (remote) methods of CFD+TOT calibration.

9 Thank you for your attention. The end?


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