1. Architecture Overview (Start here on Fri)
Architecture (Harvard v. Princeton)
Program Memory (ROM)
External
Internal
Data Memory (RAM)
Direct
Indirect
SFR’s
Instruction Execution Cycle
Risc/Accumulator
Microcode
Structure of an Assembly Language Program
Bidirectional I/O Ports
Timers/Counters
Modes
Serial I/O Port
Interrupt Controller
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2. Simple Princeton Architecture
ROM
Linear
Address
Space
W/ Mem
Mapped
IO/SFR’s
I/O Port PC IR
GPRs SP
Timer, SFR’s
RAM
address
Reset Vector
ALU
Interrupt Vect IR
mux
data
Status
Control
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3. CSE 370 - Fall 1999 - Introduction - 3
Analysis
Bottleneck into and out of memory for data and code
Use of critical 8-bit address space (256) for memory mapped I/O and special function registers (timers and their controllers, interrupt controllers, serial port buffers, stack pointers, PC, etc)
Eg. Motorola 6805 has only 187 usable RAM locations and no space for variant customizations.
But, easy to program and debug. Compiler is simple too.
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4. 8051: Modified Harvard ArchitecturePC
mux
address
Internal
ROM
(flash)
RAM
SFR’s
(direct)
Internals
Reset Vector
Usually
Stack
(indirect)
Interrupt Vect
ALU
Interrupt Vect
Interrupt Vect
8051 standard +
Enhancements
(indirect or
Direct)
Bit Addressable
External
Status
Reg. Banks
data
Control
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5. CSE 370 - Fall 1999 - Introduction - 5
8051 Memory Architecture
Advantages
Simultaneous access to Program and Data store
Register banks great for avoiding context switching and for code compression
8-bit address space extended to = 384 registers by distinguishing between direct and indirect addressing for upper 128 bytes. Good for code compression
Bit addressable great for managing status flags
Disadvantage
Confusing at first
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6. Instruction Execution
6 States/Machine Cycle,
2 Cycles/State = 12 Cycles/Machine Cycle
Most instructions are 1 machine cycle, some are 2.
Can make two ROM accesses in on memory cycle (two byte/one cycle instructions, such as ADD A,#10H.
Its a Micro-coded CISC processor (sort of an old architecture)
Interesting features
No Zero flag (test accumulator instead)
Bit operations, Bit accessible RAM
Read Modify Write operations (ports)
Register to Register Moves
Multiply and Divide operations (many 8-bit MCU’s don’t have these)
Byte and Register Exchange operations
Register banks
Data pointer registers
Addressing Modes (careful when using upper 128 bytes of RAM)
BCD oriented instructions (DA,
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7. CSE 370 - Fall 1999 - Introduction - 7
Assembly Programming
Declare Segments and Segment types
Assembler converts to machine code, with some absolute and some relocatable segments.
Linker perform absolute code location and linking to other source modules and libraries
Typical Segments
DATA
IDATA
PDATA
XDATA
CODE
CONST
Example Assembly Program
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8. Anatomy of an Assembly Program
Look for overflow in C – difficult to do
unsigned int i;
void main (void) {
register unsigned int tmp;
while (1) {
P1^= 0x01;
i = 0;
do {
tmp = i;
i += P2;
} while (tmp < i); }
Note i is global and tmp is local. What happens to local variables?
How are registers used? What happens in a subroutine call?
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9. CSE 370 - Fall 1999 - Introduction - 9
Now in Assembly
RSEG PROG
; first set Stack Pointer
START: MOV SP,#STACK-1
CLR flag ; just for show
SETB flag ; just for show
LOOP1: MOV A,il
ADD A,P2; ; sets carry
MOV il,A
JNC LOOP ; loop until carry
INC ih ; increment hi byte
MOV A,ih ; check if zero
JNZ LOOP ;
XRL P1,#01H
SJMP LOOP1
END
NAME EXAMPLE
PROG SEGMENT CODE
;CONST SEGMENT CODE
VAR1 SEGMENT DATA
BITVAR SEGMENT BIT
STACK SEGMENT IDATA
RSEG BITVAR
flag: DBIT 1
RSEG VAR1
ih: DS 1
il: DS 1
RSEG STACK
DS 10H ; 16 Bytes Stack
CSEG AT 0
USING ; Register-Bank 0
; Execution starts at address 0 on power-up.
JMP START
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10. CSE 370 - Fall 1999 - Introduction - 10
Compiled C
But, here is the optimized
Compiled C
?C0001: XRL P1,#01H
CLR A
MOV i,A
MOV i+01H,A
?C0005:
MOV R7,i+01H
MOV R6,i
MOV R5,P2
MOV A,R5
ADD A,i+01H
ADDC A,i
CLR C
MOV A,R7
SUBB A,i+01H
MOV A,R6
SUBB A,i
JC ?C0005
SJMP ?C0001
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11. CSE 370 - Fall 1999 - Introduction - 11
I/O Ports
Input ports: Hi Input impedance (like CMOS transistor gate)
Output ports: Hi drive (current source/sink) capability (like CMOS transistor channel)
Bidirectional Ports?
Weak Pullup Approach used in the 8051
Configuration bits (used in other MCU’s)
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12. CSE 370 - Fall 1999 - Introduction - 12
Basic Electronics
Speaker Interface. Design a direct drive circuit for the speakers. How much power are we dissipating in the speaker if we stay within current rating of chip?
How can we get more power to the speaker?
Note to self: Saturation v. Linear operation
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13. CSE 370 - Fall 1999 - Introduction - 13
Lab 2
Design and implement Audio Amplifier interface to 8051.
Simple program (in assembly) that can generate a controllable range of audio frequencies. Perhaps three a time.
Use interrupts to generate the pulse trains
Any algorithm suggestions? Lets keep it simple!!
Lab write-up
Characteristics of your speaker: min max tone frequency, audibility (loadness) v. frequency, etc. Anything else you notice.
Verify your speaker drivers are operating as designed. Explain what you measured.
Measure your power supply to the processor when the speaker is on. Is there a potential problem here? What should you do about it?
Resource Utilization Analysis (See lecture 2)
% of time in ISR (can you minimize this?)
Worst case stack size
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14. CSE 370 - Fall 1999 - Introduction - 14
Embedded Hardware
Microcontrollers
Smallest: PIC 8-Pin (8-bit) PIC 8-pin Microcontroller
Middle: (8 bit) Example Flash Based 8051
Many 16-bit DSP Microcontrollers
HW support for MAC, Filter Algorithms
High End: StrongArm (32 bit) Intel
Compare to pentium
External memory
Data Address Multiplexing
Memory Mapped I/O
Device Interfaces
Resistive Sensors (Strain, Temp, Gas, etc.)
Motion sensors (accelerometer)
Valve
Motor (Stepper, DC, Servo)\
Speaker
LCD Display
LED
Latches
Gas Sensors
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