2. ELECTRICAL Signaling and Power Distribution Andrew M
ELECTRICAL Signaling and Power Distribution Andrew M. Volk Intel Corporation
Introduce yourself ...
This session is an overview of the key points in Chapter 7of the 0.99 USB specifications.

3. Agenda Signaling Power Distribution USB Data Signaling Reset Signaling
Resume Signaling
Power Distribution
Power Budgets
Self-powered Devices
Bus-Powered Devices
Just as in chapter 7, there are two main topics.
Most of the time will be spent on Signaling and the last 10 min or so will be spent on power distribution.

4. Objectives
Reliable, Low Cost Physical Layer between Host, Hubs and Functions
Data Communication
Limited power distribution
Dynamic attach-detach
The goal of the specifications in this chapter is a ---- reliable ---- low cost ---- communication and power distribution mechanism between host, hubs and functions.
Dynamic attach and detach delivers 揌ot?plug and play for ease of use for the unsophisticated end user.

5. Data Signaling Bi-directional, half-duplex link
Embedded clock and data
Differential signal pair
12 Mbit / sec Full Speed (F.S.) bit rate
1.5 Mbit / sec Low Speed (L.S.) bit rate
Starting with the general signaling characteristics:
The data is sent differentially on a pair of wires.
It is a bi-directional, half-duplex, point to point link.
There are no taps into the wire. Only the signal levels at each end of the cable are useful.
The data is NRZI encoded with bit stuffing which embeds clock information into the data stream to help with data reception.
There are two data rates: Full speed at 12.0 Mb/s Low speed at 1.5 Mb/s
Low speed saves the cost of a shielded cable and other EMI suppression components and costs.

6. Signaling States J-state K-state (Inverse of J-state)
Idle State
Differentiates full or low speed
K-state (Inverse of J-state)
Start of Packet identifier (SOP)
Signaling auto resume from power suspend
Single ended zero (SE0) state
End of Packet identifier (EOP)
Signaling reset
Disconnected line
The two wires carry three signaling levels:
J-State is the idle level. It is held in this state by the bus termination resistors when no device is driving. The J-State is the opposite differential level for full and low speed devices. This makes it possible to identify the device type as soon as it is attached. Level inversion is handled by the hubs. This is covered in another session.
K-State is the opposite differential level from J-State. A J-to-K transition defines the start of transmission of a packet. The K-State also is used by a device in the suspend state to signal that it needs service.
Single ended Zero State is defined as both data signal lines low. It is used to define the end of packet, to signal reset downstream and to indicate that a hub port has not device attached to it - a disconnected port.

7. Differential Receiver Single-Ended Receivers
USB Transceiver
Differential Driver
Differential Driver
Slew rate controlled
SE0 drive capability
Differential Receiver
Sensitivity <200mV
Common mode range: < 1.0V to > 3.0V
Single-Ended Receivers
Threshold: 0.6V - 1.5V D+
Xmt Data
Force SE0 OE D-
Differential Receiver +
Rcv Data -
SE0 Detect
The USB signaling goes through the transceiver. A block diagram is shown in the foil. The general design is common for full speed and low speed, although the specifications are different for each.
It is made up of a driver, a differential receiver for data and two single-ended receivers to detect static line voltages and the single-ended zero.
Single-Ended Receivers

8. USB Connections and Terminations
F.S./L.S. USB
Transceiver D+ D+
F.S. USB
Transceiver R1
Twisted Pair Shielded D-
(45Outputs) D-
ZO = 90?5%
5 Meters Max.
(45Outputs) R1
Hub Port 0 or
Full Speed Function
Host or
Hub Port
R1 = 15K?%
R2 = 1.5K?%
This foil shows how the transceivers interface for full speed and low speed devices.
In this diagram, the host is on left and data flows 揹ownstream?from the host to functions on the right. We refer to the ports on the left as 揹ownstream ports?and on the right as 搖pstream or root ports?because they face upstream.
Note the differences between full and low speed: Cable type, length, and pullup resistor connection.
Note that these resistors are not terminations in the sense that they are impedance matching. They are used just to establish the static bus idle level.
F.S./L.S. USB
Transceiver D+ D+
F.S. USB
Transceiver R1
Untwisted, Unshielded R2 D-
(45Outputs) D-
3 Meters Max.
(45Outputs) R1
R1 = 15K?%
R2 = 1.5K?%
Host or
Hub Port
Low Speed Function

9. Full Speed Device Connect Detection Low Speed Device Connect Detection
Connect / Disconnect
VOH (min)
VIH (max)
VIL (min)
VOL (max)
VSS
Device
Disconnected
 2.5 s
Disconnect
Detected
Disconnect Detection D+
VOH (min)
VIH (max)
VIL (min)
VOL (max)
VSS D-
 2.5 s
Device
Connected
Connect
Detected
The termination resistors enable connect and disconnect detection.
On the disconnection of a device, the pulldown resistors on a downstream port pull the data lines low. The disconnect is detected when the port sees a single ended low on its data lines for more than 2.5 us. Note, if power is lost from the pullup resistor in the function, that data line is no longer pulled high and the device looks disconnected.
Connection of a device is detected by the downstream port when one of its data lines is above the SE0 detect level for 2.5 us. This defines the idle (J) state.
The data line that is pulled high defines the type of device that is connected: D+ high = full speed D- high = low speed
Full Speed Device Connect Detection
VOH (min)
VIH (max)
VIL (min)
VOL (max)
VSS D- D+
 2.5 s
Connect
Detected
Device
Connected
Low Speed Device Connect Detection

10. Packet Delimiters SOP, EOP
Bus
Idle V OH
(min) V
SE0
(max) V
SE0
(min) V OL
(max) V SS
First Bit of Packet
SOP
Bus Driven
to Idle State
EOP
This slide shows the signaling used in a packet transmission for both full speed and low speed. The actual content of the packet is described in the Protocol chapter ( chap. 8) and in another session.
The packet starts with the SOP transition from J-to-K states. The first bit may be slightly distorted as it passes through hubs, so its timing should not be used to establish lock to the data stream.
The data proceeds from there differentially until the end of packet (EOP).
EOP is signaled by a two bit wide SE0 signaling, followed by a J-state to restore the idle level, and followed by floating the bus, to prepare for a response.
Again the EOP may be distorted as it passes through the hubs. A narrower EOP is acceptable at the receiver. Also, the EOP may be shifted later in time and the receiver logic has to allow for that.
Bus Idle V OH
(min) V
SE0
(max) V
SE0
(min) V OL
(max) V SS
Last Bit of Packet
Bus
Floats

11. Data Encoding NRZI data format Zero bit stuffing after 6 ones
Data toggled on a ?
Zero bit stuffing after 6 ones
Ensures a data transition R a w D a t a I d l e
Sync Pattern
Packet Data
As mentioned before, the data is NRZI encoded to reduce the number of transitions on the wire.
A data zero is indicated by a change of differential state on the bus. No transition occurs for a data one.
Since one抯 cause no transition, bit stuffing is used to insure a minimum transition density in the datastream so that the receiver can maintain lock to the data. A zero is inserted after six (6) ones. This is done at all times, even the last bit before the EOP.
Stuffed Bit B i t S t u f f e d I d l e D a t a
Sync Pattern
Packet Data
Six Ones N R Z I I d l e E n c o d i n g
Sync Pattern
Packet Data

12. Full Speed 12 Mb/s Shielded, twisted cable Driver characteristics
Frequency Tolerance ?500ppm
Shielded, twisted cable
Z0 = 90  ?5%
Driver characteristics
45  ?5%
Rise/ Fall time: Min 4ns, Max 20ns
Full speed specifications:
The 2500 ppm frequency tolerance allows the use of frequency synthesizer chips as a frequency source. The accuracy of the host clock has to be known within 500 ppm such that the 1.0 ms frame time it produces has a 500 ppm accuracy.
The rest of the specs are straightforward.

13. Bus Driver Example implementation of a full speed driver
Vcc = 3.3 V ?0.3
Equiv. Output Impedance  15  30 
TxD+ D+
(45 
Imped)
Identical OE
CMOS
Silicon drivers have very poor impedance control - typically +100% to -50%. To get reasonable signaling quality, the overall driver must be better than ?5%.
This is an example of a full speed driver using a low impedance driver and an external resistor.
Any combination of buffer impedance and resistor can be used that meets the 15% total tolerance.
Buffers
TxD- D-
(45 
Imped) 30 

14. Full Speed Signaling
Round
One Bit
Trip
Time
Cable
(12Mb/s)
Delay V OH
(min)
Signal pins
pass output
spec levels
after round
trip cable delay
Driver
Signal Pins
* (See note) V OL
(max)
VSS
*(Slight impedance mismatch shown)
One Way
Cable Delay
This figure shows the signal propagating down the cable. The buffer and line are matched so the initial swing is half the open circuit full swing. The other end of the cable is effectively an open circuit, so the wave reflects with a positive coefficient and full swing is seen there. The reflection returns to the driver. The driver impedance is matched to the cable, so there is no second reflection and the signal returns to it full swing at the end of bit time.
The total round trip delay is the rise and fall time plus two times the cable delay. The total must be less than 80 ns. V OH
(min)
Signal pins
pass output
spec levels
after one way
trip on cable
Receiver
Signal Pins V OL
(max)
VSS

15. Low Speed 1.5 Mb/s Driver characteristics Unshielded, untwisted cable
Saves EMI suppression costs
1.5% Frequency tolerance
Driver characteristics
Rise/ Fall time: Min 75ns, Max 300ns
Required on low speed functions and on the downstream ports of Hubs
The low speed requirements have been loosened to save cost.
The frequency tolerance allows the use of resonators instead of crystals.
Low speed devices do not require shielded or twisted pair cables, and less EMI suppression.
This is achieved by slow rise and fall times.
Since Hubs interface to low speed devices, they also need to have low speed buffers on their downstream ports.

16. Low Speed Signaling
One Bit
Time
(1.5Mb/s) V OH
(min)
Signal pins
pass output
spec levels
with minimal
reflections and
ringing
Driver
Signal Pins V OL
(max)
Low speed signaling is outside the transmission line regiment. There is no impedance matching or reflections. The signal should look about the same on both ends, with some delay for the cable.
VSS
Receiver waveforms are the same as on the driver, after including the cable delay

17. Reset Signaling Signaled with a long Single-Ended Zero
Reset not to be recognized until after 2.5 s
Must be recognized by 5.5 s (if device active)
Downstream Signaling only
Sent by any downstream hub port
Returns device to its default state
USB allows devices on the bus to be reset by asserting a SE0 state on the bus for an extended time - more than 2.5 us. This allows the recovery of locked up devices or the return of the bus to its initial state. (Reset is always a nice thing to have.)
Reset only applies in the downstream direction. It can be sent by any hub port on command from the host.
The device returns to its default state: responding to the default address and unconfigured.
A device which is active (awake) must start its reset sequence with in 5.5 us of receiving the SE0. A device which is suspended will awake and reset.

18. Suspend & Resume Suspend Resume All devices support suspend
Enter suspend state after seeing idle bus for 3 ms
Suspend current  500 A from bus
Resume
Devices resume on seeing non-J state
USB devices can cause 搑emote wake-up? by signaling with a K-state
Suspend puts the device into a low power state. All devices must support a suspend mode. The maximum current drawn from the USB power lines in the suspend state is 500 uA. A device enters suspend after seeing no activity on the bus for at least 5 ms. SOF provides bus activity to full speed devices and hubs produce a keep-alive pulse from SOF for low speed devices.
Resume occurs when devices see a non-idle state on the bus. RESET / any bus activity is sufficient. Devices have 10 ms to wake up.
Some devices have the capability to remotely wake-up the system by signaling a K-state.
NEXT SLIDE

19. Resume Signaling (Apologize for the eye chart)
Bus Driving
Bus Idle or
Driven at other end
suspend state
All devices in
signaling (EOP)
Host
Last bus activity
Host ends resume
Host Port
K-state
J-state
Host begins resume signaling
Hub
K-state
J-state
Root Port
Hub
Hub signaling DS only
Other DS
K-state
J-state
Hub Ports
Hub begins resume signaling
(Apologize for the eye chart)
This slide shows the sequence for a remote wake-up from a device. The process starts with he host stopping bus activity and putting the network into suspend.
After a delay, the an internal condition causes the device to wake up. It signals the network that it wants attention by sending a K-State 搑esume.
The next upstream hub gets the resume signal and turns around and sends it upstream and downstream on all enabled ports including the signaling port.
The resume gets to the host which in turn reflects the resume on all its enabled downstream ports. Any hub downstream of the host will now see the resume on its root port and pass the signaling on downstream.
After a delay the hubs involved in propagating the resume up to the host are fully awake and stop sending the resume to the host. They turn around and send the value on their root port. Now all devices are seeing the resume sent downstream.
After a delay of 20 ms, the host ends its resume signaling and starts normal bus operation.
Function
K-state
J-state
Hub Port
Remote Wake-up
Function
Function
K-state
J-state

20. Power distribution Hubs may be self-powered or bus-powered
Two current levels: 100 & 500 mA
Overcurrent protection for safety
Wire gauge options: AWG
Transitioning now to power distribution.
There are two main classes of USB devices, those that supply their own operation power and those that draw power from the bus.
Devices can be powered from the bus if they require less than 500 mA (5 units of current). A second class of bus-powered device are called low power if they draw less than 100 mA (1unit of current). Low power devices can be plugged into other bus powered devices allowing a two deep chaining of devices.
All devices must draw no more than 100 mA (1 unit) from the bus on attach, until it is configured by the system software. If there is not the budget for that power, the device will not be configured and left disabled.
Devices (hubs) which are self-powered and supply voltage to downstream devices also have to provide overcurrent protection to meet UL requirements.

21. Voltage Drop Voltage drop per wire/connector: 0.125 V
4.75V (min)
4.40V (min)
Host or
Bus-Powered
Bus-Powered
Hub
Function
Powered Hub
Voltage drop per wire/connector: V
Budget for power switch: V
The current limitations for bus powered devices is set by source voltage and IR drop limits. This illustrates the voltage drop budget for USB.
A voltage drop of 125 mV is allowed in each segment of the cable/ per wire. A table of cable lengths, current and wire gauge is given in Chapter 5.
Bus powered hubs must have power switches for their downstream ports to prevent illegal power hookups. Example: hooking a bus-powered hub into a bus-powered hub. Not enough voltage budget left for a third downstream connection.
The budget for the power switch is 100 mV

22. Compound Self-Powered Hub
Embedded
Function
Hub Controller
Downstream
Data ports
Downstream V
bus
Upstream
Data Port
Regulator
Current Limit
Upstream V
1 unit load (max)
Local Power
Supply
On/Off .
5 unit loads/port
This is the general case for a self-powered device. It contains a hub, other internal functionality and downstream ports to allow further general expansion. We recommend that all self-powered devices provide a hub with downstream interconnect capability.
The internal power supply powers the hub, internal function and provides 5 units of current capability to each downstream port. Some form of overcurrent limiting has to be provided to meet regulatory requirements.
The Serial Interface of the Hub can be separately powered from the bus to allow the device to talk to the system even if the device抯 own power is off. In this case, the Serial interface is limited to 1 unit of current. This allows it to be safely attached anywhere in the system.

23. Bus-Powered Hub .
Downstream
Data ports
Upstream
Data Port
Hub Controller
Embedded
Function
Upstream V
bus
1 unit load (max)
Regulator
This is the general case for a bus-powered device. It also contains a hub, other internal functionality and downstream ports to allow further expansion for low power devices.
In this case the sum of current to the hub and internal functions, plus one unit of current per downstream port is limited to 5 units. Downstream ports are limited to 1 unit of current each (a low power device, an unconfigured device or a self-powered device). If the internal hub and function take two (2) units of current, then the number of down stream ports is limited to three (3).
The Serial Interface of the Hub must draw less than one unit of current until the internal functions are enabled. The system software will not switch on the downstream power unless this hub is attached to a self-powered hub.
Downstream V
bus
On/Off .
Power Switch .
1 unit load/port .
Power Switch .

24. Self-Powered Function
Upstream
Data Port
Serial Interface
Controller
Function
Upstream V
bus
1 unit load (max)
Regulator
This shows a self-powered function. Power is supplied from a local power supply.
There is a option of powering the Serial Interface Controller from the bus. This allows the device to communicate with USB, even if the device抯 power is shut off. Note that the maximum current that the Serial Interface can draw is 1 unit (100 mA)
Local Power
Supply
Regulator

25. Bus Powered, Hi Power Function
Upstream
Data Port
Serial Interface
Controller
Function
On/Off
1 unit load
(max)
Upstream V
bus
5 unit loads(max)
Regulator
In this case, the function takes all its power from the bus. When the device is first powered up and as long as it is unconfigured, it can draw only 1 unit of current from the bus. This allows it to be plugged safely anywhere in the bus topology.
If it is plugged into a self-powered hub, it can be configured and draw up to 5 units.
If it is plugged into a bus-powered hub, it can be interrogated by the system software, but it will not be configured because it draws too much current.
Note that the Serial Interface has to work when plugged into the bus-powered hub with 4.4 V on the wire.

26. Dynamic Attach/Detach
Staggered power/data pins in plug
Insures power will not flow through data lines
Dynamic attach
Sufficient bypassing needed in hub ports
Maximum bypass capacitance or current limit in root ports
Dynamic detach
Requires minimum bypass capacitance in hub/function root ports
Allowing dynamic attach and detach allows the user to dynamically reconfigure the system without shutting it off and rebooting. The change in topology will be detected by the hub and appropriate drivers will be added or deleted.
To safely attach and detach, the plug has been designed with recessed data pins. The data pins connect only after the power is applied to the device and disconnect before the power is removed. This prevents power from going through the data lines and overstressing the data drivers.
Attaching a device causes charge sharing between the capacitance in the hub and in the device. This requires sufficient bypassing in the hub and some maximum inrush current to devices. This is accomplish by a maximum device bypass capacitance or current limiting in the device.
Detach cause a significant flyback voltage to be developed. This requires minimum bypass cap in the devices to prevent power supply voltage reversal.