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J. R. A Booth, D. G. Charlton, C. J. Curtis, P. J. W. Faulkner, S

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Presentation on theme: "J. R. A Booth, D. G. Charlton, C. J. Curtis, P. J. W. Faulkner, S"— Presentation transcript:

1 Production Test Rig for the ATLAS Level-1 Calorimeter Trigger Digital Processors
J.R.A Booth, D.G. Charlton, C.J. Curtis, P.J.W. Faulkner, S. Hillier, G. Mahout, R.J. Staley, J.P. Thomas, D. Typaldos, P.M. Watkins, A. Watson, E.-E. Woehrling School of Physics and Astronomy, University of  Birmingham, Birmingham, UK R. Achenbach, V. Andrei, F. Föhlisch, C. Geweniger, P. Hanke, E-E. Kluge, K. Mahboubi, K. Meier, F. Rühr, K. Schmitt, H.-C. Schultz-Coulon, P. Weber Kirchhoff-Institut für Physik, University of Heidelberg, Heidelberg, Germany B. Bauss, S. Rieke, R. Stamen, U. Schäfer, S. Tapprogge, T. Trefzger Institut fur Physik, Universität Mainz, Mainz, Germany E. Eisenhandler, M. Landon Physics Department, Queen Mary, University of London, London, UK B.M. Barnett, I.P. Brawn, A.O. Davis,J. Edwards, C. N. P. Gee, A.R. Gillman, V.J.O. Perera, W. Qian, D.P.C. Sankey Rutherford Appleton Laboratory, Chilton, Oxon. UK C. Bohm, S. Hellman, A. Hidvégi S. Silverstein Fysikum, Stockholm University, SE Stockholm, Sweden Gilles MAHOUT

2 ATLAS Level-1 Calorimeter Trigger System
Calorimeters Muon Tracking Calo Muon Calorimeter Trigger Muon Trigger 75 kHz L1 e/g tau jet Et SE m Fifo Readout Driver ROD ROD ROD R O B R O B R O B 1000 Hz Readout Buffer Central Trigger Processor L2 Event Builder 200 Hz Front End Buffer Region of Interest (RoIs) Storage Gilles MAHOUT

3 Identifying Clusters: e/g, tau and jets
The trigger works on a reduced granularity with trigger towers covering 0.1 x 0.1 in  x  The e.m. and tau are based on windows of 4 x 4 trigger towers, in both e.m. and hadronic calorimeters The jet trigger is based on windows of 4 x 4 “jet elements”, each 0.2 x 0.2 in  x  , with e.m and hadronic calorimeters summed This windows slide in eta and phi to fully cover the calorimeter RoIs are defined by their (h,f) coordinates – a window is a local candidate trigger object if it is a local maximum RoIs are tested against sets of threshold values, each made up of cluster and, (for e.m. and tau) isolation energies. Because the algorithms involve overlapping data, Trigger Tower data are shared: between algorithm chips onboard between modules, across a custom-built backplane Module 0 Module 1 Module 2 Module 3 Gilles MAHOUT

4 Central Trigger Processor
System Data flow ~7200 Calorimeter Trigger Towers Jet/Energy Processor Pre-Processor 141 GBytes/s 589 GBytes/s 0.7 GBytes/s Central Trigger Processor Cluster Processor 448 GBytes/s 75 kHz L1A Data Check RoI Level 2 Readout Gilles MAHOUT

5 ATLAS Level-1 Calorimeter Trigger System
Input/output data DAQ RODs To DAQ Jet / ET (JEP) 2 ROD crates RoI RODs 0.2 x 0.2 To CTP To L2 Pre- Processor (PPr) 2 JEP crates Feature types/ positions e/, /had Clusters (CP) Analogue tower sums 0.1 x 0.1 (~7200) (>300 Gbyte/s) To CTP 8 PPr crates 0.1 x 0.1 4 CP crates Fibre F/O Slow Control CANbus TTC CTP DCS Gilles MAHOUT

6 Level-1 Calorimeter Trigger System: Production Test Rig
All digital boards have passed their Production Readiness Review pending a full crate test made on pre-production modules: Cluster Processor Modules and Jet/Energy Modules. Need to gear up to the equivalent of ¼ of full trigger in one crate Additional production boards were manufactured Need to emulate calorimeter LVDS: special boards have been built to source data Ordered LVDS cables with final ATLAS length link cables needed for final system, around 300 per crate Production custom-built backplane available for the test Additional tests Generate 18 active links to fully populate the ROD input Test of the DCS with a full crate of boards: Monitoring on-board currents, voltages and temperatures using PVSS Simulation of the hardware easily expandable to accommodate several crates and modules Gilles MAHOUT

7 Calorimeter signals: LVDS Source Modules
Custom built LVDS Source Modules (LSM) have been used as source of 400 Mbit/s serial LVDS 1 LSM per board Custom backplane receives the emulated calorimeter LVDS from the rear Final number 308 cables 14 LSMs 28 TTCrx chips on mezzanine board Gilles MAHOUT

8 Cluster Processor Module: Full Crate Test
Contents of the crate 14 CPMs 1 CPU mounted on a special adaptor card to fit the custom backplane 1 board designed to broadcast the TTC clock to each individual module via the backplane; also provide interface to external CANbus 2 Common Merger Modules Gilles MAHOUT

9 Cluster Processor Module: Crate Test results
Patterns used Ramp to test LVDS input Test vector with programmable occupancy rate Long term measurement No parity error observed in 5 hours on real time data directly seen from the source, or through backplane Timing window investigation For the fastest links, data across backplane show parity error free window of 2 ns Crate Power Consumption ~ 200 A at 10% occupancy (<300 A, in PSU specification) P ~ 1 kW FPGA behaviour Big FPGA temperature less than 45oC Internal current within specification Chip # (.1 ns) Gilles MAHOUT

10 Jet/Energy Module: Crate Test Results
Contents of the crate as before, but with 7 JEMs instead of CPMs Empty slot between board types to avoid data mismatched across backplane Results: No links lost on LVDS No parity errors observed after 5 hours across the backplane 10-bits Ramp Gilles MAHOUT

11 Common Merger Module 10 ns Two CMMs in crate
No parity errors in 5 hours on backplane data All CMM inputs show wide parity error free windows with CPMs as inputs No boards 10 ns Parity Errors No Parity Errors (.1ns) Gilles MAHOUT

12 ROD Test ROD can receive up to 18 modules via G-links Results:
16 boards connected Results: No parity errors observed in 1 hour 5 CPMs feeding ROD had no data errors after 200k events Gilles MAHOUT

13 Detector Control System on crate
CANbus using CANOpen protocol to read out all temperatures and currents of up to 14 modules PVSS used to monitor currents, voltages and temperatures Alarm implemented and successfully tested Overnight runs possible during production phase Gilles MAHOUT

14 Conclusions The full-crate tests have been successful:
Debug early problems in comfort of the laboratory rather than in the ATLAS pit Check stability of the digital board designs Check crate power consumption Scale up DCS to several boards and crates All boards are into production now First production modules are now being used in ATLAS pit Gilles MAHOUT


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