1. TileCal upgrade EVO meeting Demonstrator tesks

2. Task list Drawer mechanics Mini/Standard C-F (Cooling included)
HVPS + dividers C-F
LVPS Argonne
FEB 3-in-1 Chicago
FE-ASIC C-F
QIE Argonne
MainBoard/DaughterBoard Chicago-Stockholm + C-F (MB-2) and Argonne (MB-3)
Fiber installation ?
Off detector electronics/firmware Valencia-LIP-Stockholm
Moby Dick 4 Brasil, C-F, Dubna, LIP, Prague, Stockholm, UTA, Valencia
Bld-175 test&integration facility Brasil, CERN, C-F, Dubna, LIP, Prague, Protvino,Stockholm,
UTA, Valencia
Services (Cables, fibers) C-F + others
New drawer installation procedures C-F + others
(Tooling included)
Software Rio
DCS C-F (HT and Laser), other parts?
PMT blocks/mixer use existing Dubna, Jerevan, Prague
There is an early version of a MS-project task description

3. We must group the tasks to limit interactions
FEB 3-in-1 Chicago
FE-ASIC C-F
QIE Argonne
MainBoard/DaughterBoard Chicago-Stockholm + C-F (MB-2) and Argonne (MB-3)
Off detector electronics/firmware Valencia-LIP-Stockholm
HVPS + dividers C-F
LVPS Argonne
Moby Dick 4 Brasil, C-F, Dubna, LIP, Prague, Stockholm, UTA, Valencia
Bld-175 test&integration facility Brasil, CERN, C-F, Dubna, LIP, Prague, Protvino,Stockholm,UTA, Valencia
Drawer mechanics Mini/Standard C-F
(Cooling included)
Services (Cables, fibers) C-F + others
New drawer installation procedures C-F + others
(Tooling included)
Software Rio
DCS C-F (HT and Laser), other parts?
PMT blocks/mixer use existing Dubna, Jerevan, Prague
Fiber installation ?

4. The relationship between the different FEB projects
The first MainBoard and its Processing DaughterBoard will be developed for 3-in-1, but keeping the FE-ASIC and QIE needs in mind to spin off MB-2 (for FE-ASIC) and MB-3 (for QIE) (Francois’ table)
DB should be the same
This would make the firm- and software developed for 3-in-1 available to the other FEB projects, thus reducing the effect of the later schedules
FPGA evaluation boards can be used in anticipation of final off detector solution

5. The relationship between the HV, LV and mechanics
Make the electronics systems compatible with the mini-drawer partitioning
Keep the present mounting hole positions ….
This will allow the electronics to be developed using present drawer, moving to mini-drawers if and when they are available

6. The relationship between HV and LV subtasks
Apart from DCS HV and LV parts can develop independently until a late stage of integration
LV subtasks can use present HV until the new version is available
Standard power supplies can be used for HV and LV during the development phase, but should be made compatible with later solution

7. FEB Milestones 3-in-1 alternative Feasibility tests Done
FEBoard design Done
FEBoard functional tests Done
FEBoard radiation tests Done
Prototype design of MB, DB Q3-11
MB, DB prototype tests Q4-11
Design of MB,DB Q1-12
MB, DB functional tests Q2-12
MB, DB radiation tests Q2-12
System tests in Bld 175 Q3-12
Tests in test beam Q3-14
QIE alternative
Feasibility tests Done
Submission of final chip Q1-12
FEBoard design & manufacturing Q3-12
FEBoard functional tests Q3-12
FEBoard radiation tests Q4-12
Design of MB-3 Q2-12
MB-3, DB functional tests Q4-12
System tests in Bld 175 Q4-12
Tests in test beam Q3-14
FE-ASIC alternative
Feasibility tests Done
Design ASIC FATALIC 1 & 2 in IBM 130 nm Done
Test FATALIC1 & C-F Done
Test FATALIC2 in Bld Q3-11
Design FATALIC3 Q4-11
Test C-F Q2-12
3in1 prototype design Q4-11
3in1 prototype tests at C-F Q1-12
Prototype design of MB-2 (similarto3-in-1 DB) Q4-11
MB-2 prototype tests at C-F Q2-12
System tests in Bld Q3/Q4-12
Design of FATALIC4 (ADC) Q2-12
FATALIC4 tests at C-F Q4-12
Radiation tests Q1/Q2-13
Final designs for production Q3-13
Tests in test beam Q3-14
Comments:
Depending from the true upgrade schedule, the above “final” design
could be reviewed a new time if more time is available.

8. LVPS, HVPS and divider Milestones
Voltage specifications Q3-11
Demonstrator prototype design Q2-12
Tests Q2-12
System tests in Bld 175 Q3-12
Design of demonstrator prod. Version Q4-12
Tests Q1-13
Comments:
Start from present design 20v?
One neg voltage (-5 and/or -15)? How sensitive to voltage level
noise? Special design using discrete compoents of negative
regulators.
HVPS
Prototype design in USA done
Prototype tests done
Tests in Bld Q3-12
Decision point on the final option Q1-13
Tests in test beam Q3-14
Comments:
There are 6 options (Half on the drawers, half in USA15). For the
demonstrator in Bld 175, the option is this one having the regulation
in USA15, starting from the present ATLAS design, but with the HV
source and LV power supplies embedded. That does not prejudge
what will be the final choice.
New divider
Prototype design done
Prototype tests done
Design of production version done
Test bench for production done
Radiation tests Q1/Q2-12
Tests in Bld Q3-12
Tests in test beam Q3-14
Comments:
The decision of using these new dividers is strongly connected
to physics goals.

9. Mechanics related Milestones
Mini-drawer alternative
Feasibility tests (Sliding validation) Done
Prototype design (cooling included) Q1-12
Initial tests Q2-12
Tests in Bld 175 Q3-12
Decision point Q1-13
Design of production version Q3-13
Tests in test beam Q3-14
Comments:
This study must take into account from the very beginning of
the special cases corresponding to Tilecal modules with
different drawer accesses. The cooling requests are depending
from the FE options.
Services
Collection of specifications Q3-11
Prototype design Q2-12
Tests in Bld Q3-12
Design of production version Q3-13
Tests in test beam Q3-14
Comments:
The services are fully depending from: the choice of the FE option,
the choice of standard or mini drawers, the choice of the DCS links.
Moreover, the study must take into account from the very beginning
of the special cases corresponding to Tilecal modules with different
drawer accesses.C-F could contribute to these studies, but not alone.
New drawer installation procedures

10. Remaining subtasks Moby Dick 4 Q3-12
Bld-175 test&integration facility Be prepared when tests are needed
Software Connected with test bench development
DCS Connected with test bench development
PMT blocks/mixer Use existing components, compensate missing units
Fiber installation Direct path??

11. Test benches PC Adapter- board
ADC
HiTechGlobal FPGA board
Off detector electronics
ML605
On detector
logic
3-in-1
FE board
ATCA
100 m
fiber
PCI-e
DAQ
TTC
A system slice model was assembled for developing the upgrade firmware using a combination of dedicated hardware and of the shelf FPGA modules.
This allows developing firmware and also software in parallel with the hardware instead of doing it after the hardware development is finished.
The aim is to gradually replace the model parts with prototype solutions and later with production parts while adapting the firmware successively to the updated hardware.
It will also help to provide test procedures for the evolving system

12. Test benches Firmware and especially software for a more final system:
Can be developed on a reduced system: