1. the Operating System (OS)

2. The Operating System (OS)
Editor
Operating System
P2: Compiler
P3:
Doom
MIPS
At any one time the processor (MIPS) is only excecuting one program (process).

3. Our Assembler
.text
.data
User
.ktext
.kdata
Kernel

4. The Hardware
.text
.data
User
ERROR! OK
.ktext
.kdata
Kernel

5. How does the User program pass control to the Operating System?
Take control on ERROR
Pass control explicitly

6. ERROR Ex, Arithmetical Overflow li $4 0x80000000 neg $4 $4
(sub $4 $0 $4) 0x
- 0x 0x
Sign differs
Same Sign ! ERROR

7. Signed/Unsigned Arithmetics
The only difference is that
Unsigned never causes ERROR
Signed causes ERROR on Overflow etc.
Signed
ADD
SUB
ADDI ..
Unsigned
ADDU
SUBU
ADDIU ..

8. Memory Error Instruction Memory = Bad PC Data Alignment Error
Access Protected Memory from User mode
Nonexistent Memory
(Page fault Chapter 7)

9. Do not confuse ! A Memory that tells the pipeline to Wait
relate to “cache miss”
A Memory Error or Page Fault
realte to “TLB miss”

10. The Consequence A Memory that tells the pipeline to Wait
Pipeline Stall
A Memory Error or Page Fault
Exception

11. Pass control excplicitly
The User wants some service from the Operating System
File I/O
Graphics
Sound
Allocate Memory
Terminate Program (no HALT instruction in real MIPS)
SYSCALL (casuses an exception)

12. How to choose service: Is there different SYSCALLs?
NO! Only one, use a register ($a0) to choose
Use other registers ($a1,...) as parameters
Use $v0 for result
ori $a1 $r0 ‘A’ ; Char ‘A’
ori $a0 $r0 0x00 ; Write Char
syscall
ori $a0 $r0 0x01 ; Read Char
or $a1 $r0 $v0 ; Move result $v0->$a1
ori $a0 $r0 0x00 ; Echo Char

13. Other ways for the Operating System to take control?
External Interrupts, (not caused by User program)
Timers
Harddisk
Graphics
Sound
Keyboard, Mouse, other perhipals

14. Coprocessor CP0 8 Bad Memory Address 12 Status Register
13 Cause Register
14 Exception Address

15. Status Register
“Mode Stack”
External Interrupt enable/disable

16. “Mode Stack” OLD PREVIOUS CURRENT KU IE KU IE KU IE KU IE5
KU IE
KU IE
KU IE KU IE
0 Kernel Mode
1 User Mode
0 External Interrupt Disable
1 External Interrupt Enable

17. Exception / Interrupt Occurs
OLD
PREVIOUS
CURRENT
KU IE
KU IE
KU IE
KU IE
KU IE KU IE
0 Kernel Mode
1 User Mode
0 External Interrupt Disable
1 External Interrupt Enable

18. RFE Instruction (priviliged)
OLD
PREVIOUS
CURRENT
KU IE
KU IE
KU IE
? ?
KU IE
KU IE
We restore the PREVIOUS (KU,IE) into CURRENT

19. Resume User Program CP0 $14 Holds the Exception Address
(Addr to instruction in EX stage)
mfc0 $k0 $14 ; resume address
jr $k ; $k0 kernal reg
rfe ; “delayed branch”

20. Shared “Stack” Assume that the User program uses the stack:
Can the Kernal use the same stack ($sp)?
Yes, but remember never to use memory below $sp, it will be destroyed (overwritten)!!
$sp
Kernal Data
Kernal Data
$sp
User Data
User Data
User Data
User Data

21. External Interrupts (CPO $14)
Bit 0, (Current Interrupt Enable)
All External Interrupts Enable/ Disable
Bit , (individual interrupt enable) 15 10
Current IE
INT 5
INT 4
INT 3
INT 2
INT 1
INT 0

22. Enable External Interrupt 2
Bit 0 = 1, (External Interrupt Enabled)
Bit 12 = 1, Interrupt 2 Enabled 15 10
INT 5
INT 4
INT 3
INT 2
INT 1
INT 0
Current
IE = 1 1

23. Cause Register (CP0 $13) Bit 5..2, Exception Cause Code
Bit , Interrupt Pending
Bit 31, Exception Occur In Branch Slot 31 15 10 5 2 BS
INT 5
INT 4
INT 3
INT 2
INT 1
INT 0
Ex 3
Ex 2
Ex 1
Ex 0
....
....
...
Pending Interrupts
Exception Cause Code
see Table 4.3 LSI Logic

24. Check if Interrupt 2 Pending
Mask with bit 12 15 10
CP0 $13
INT 5
INT 4
INT 3
INT 2
INT 1
INT 0
AND 1
INT 2