1. EECS 473 Advanced Embedded Systems
Misc. things Midterm Review

2. Exam When and Where: Coverage: Study: Tuesday 10/24 6-8pm
Room: 1571 GG Brown
Coverage:
Everything we’ve done (lab, homework, lecture) other than switching supplies
which we will restart/finish after break
Study:
Sample questions in this presentation
Old exams
Labs, homework.
HW1 answer key up later today (want to see common issues before posting)

3. Quick things before the review
Milestone meetings
Group status reports
Monday afternoon and Tuesday morning
No class on Tuesday
Doodle on Piazza.
Basically
You tell us where you are at
bring 3 copies of MS1 status report
Feel free to update the hard copy if you wish.
We ask you questions
You ask us questions
The goal here is not evaluation
It’s to help where we can
Start on Thursday
Next in-class report:
What are you blocking on?
Where are your problems?
And guest speakers

4. Start the Review Interface design for hardware Real-time systems
Scheduling
Licensing issues
Software platforms
Barebones
Barebones w libraries (Arduino)
RTOS (FreeRTOS)
Full OS (embedded Linux)
PCBs and power
Terminology
Power integrity
Batteries
Linear regulators including LDOs
Design
Expect a design question

5. Topic: Interfacing Writing software interfaces for hardware
Ideally have a standard interface for both hardware and programmer.
Makes it easy to port software.
Also means it’s obvious what hardware control to provide.
Like any interface, standardization here is very powerful, but comes at a cost. Abstracting away interface issues makes things less efficient.
Examples?

6. Interface questions Might be asked to design an API
Might be asked to critique an API
Arduino, Tinkerforge worth looking at.
Might be asked to explain this figure or ideas related to it.
Might be asked to explain or apply this figure:

7. Topic: Real-time systems and scheduling
"those systems in which the correctness of the system depends not only on the logical result of the computation, but also on the time at which the results are produced";
Time matters
Hard, soft, firm deadlines
Validation if very difficult
How do you know the worst case timing?
Really difficult to prove worst case. Cache misses, branch prediction, etc. make for a very complex situation.
For safety-critical things, even a “large engineering margin” isn’t enough.
Need to actually figure it out.

8. Topic: Real-time systems and scheduling
Rate monotonic scheduling
Static priority scheme
Assumes all* tasks are periodic.
Give priority to tasks with lower period.
Total utilization helps figure if schedulable.
If is less than n(21/n-1) (n=number of tasks) it is schedulable.
If over 100% not schedulable
If neither is true, do critical instant analysis.
EDF
Requires dynamic priorities
Works if less than 100% utilization

9. Example scheduling questions
Find a set of tasks with % utilization, period, etc. that RM can’t schedule but EDF can.
Solve specific problems:
Explain properties of EDF/RMS/RR/FIFO.
We didn’t do much in class with RR and FIFO…
Why might we prefer one of these over the others?
Group T1
Execution
Time
Period T2 T3
CPU
Utilization? RM
Schedulable?
EDF A 1 3 B 6 2 4 10 C D 5 7

10. Topic: Software platform
We covered three or four basic platforms for software development for an embedded system.
Barebones
Write everything yourself
Barebones plus libraries
Import some useful libraries but otherwise write it all yourself.
RTOS
Basic scheduler with a lot of control
Generally a fair bit of support.
I/O devices, memory management, etc.
Fast interrupts processing possible/reasonable/”easy”
Full OS
Give up a lot of control
Have to deal with a very complex system
Get lots (and lots) of software support
Vision, databases, etc.

11. FreeRTOS Tasks and scheduling Creating tasks (xTaskCreate) Semaphores
Deferred interrupt processing.
Can dynamically change priority.

12. FreeRTOS questions Given needed function prototypes used in lab:
Write code which does RM scheduling of two tasks.
“A” has a period of 10 clocks and runs for at most 4 clocks.
“B” has a period of 6 clocks and runs for at most 3 clocks.
Might also be asked to handle deferred interrupts and semaphores
What is the difference between Ready, Running, Blocked and Suspended in the diagram to the right?

13. Embedded Linux What limitations on real-time you might have
Can be fairly small
Things like busybox help
I/O has a standard interface
File model
Not always ideal.
But there is a lot of complexity here
We spent a fair bit of time writing drivers.

14. b) Describe the role of the memory_fops struct
b) Describe the role of the memory_fops struct. In particular, what would happen if we changed the .read line to “.read = bob”?
2) What is the difference between the “major number” and “minor number”? 3) How do you create a character device that is associated with a given LKM?

15. Licensing What is a viral license is
Why it matters in embedded perhaps more than elsewhere.
LKM
Impact on business model
Hardware people tend to use a lot of other people’s code (legally).
Vendor’s driver code etc.
Libraries.
GPL and Creative Commons Licensing.

16. PCBs Basic terminology and issues
Trace, mil, thou, via, silkscreen, clearance, layers, rat’s nest, etc.
Through-hole vs surface mount
Schematic vs. Layout
When to “neckdown”

17. PCB questions (F12 midterm)
Say you’ve done a PCB design at work. There is one power trace that is highly sensitive to additional resistance (it is the power line for an FPGA that has strict voltage requirements). Your boss says that “Your trace is too long. You’ll get a lower resistance if you neck down the trace and shorten it.”
Sketch and label a diagram that illustrates the situation (including why your trace was so long to begin with) and how your boss wants you to fix the problem
Say that the original trace was 5 cm long and 30mil wide and that after your follow her suggestion, the new trace is 2 cm long and 30 mil wide for all but 5 mm of those 2 cm where it is 6 mil wide. Would you expect the new or old trace would have a lower resistance? Show and explain your work.
Assuming her solution does reduce the resistance and still meets the PCB design rules; identify the biggest problem that should none-the-less concern you with this change.

18. Power integrity Discuss keeping Vcc/GND constant as possible.
Recognize that our devices can generate current draw variations at a huge number of frequencies.
Spikes or droops could break our device.
Need caps.
Small and large
Get right values

19. Batteries Understand mAh
Understand that mAh will be less if draw too quickly.
Be able to work basic math using specific battery properties.

20. Simple battery example
800mAh battery.
If we need 3.5V (or more) how long will this battery last at a 1.6A draw?

21. Battery note Be very careful putting batteries in parallel.
Homework question made it seem easy
But, as mentioned in class, putting two battery packs in parallel that aren’t balanced (same charge) for some reason can cause problems.
Where problems can include a fire.
Generally, you should instead buy a battery with a higher capacity.
Overcharge examples:

22. Other things Linear regulator Understand ideal
Or nearly ideal with just a constant IQ.
Be able to read and use a Linear regulator part specification

23. Example You have a linear regulator with a 6V input and 3V output.
The output current is 100mA
The quiescent current is 2mA
What is the % of power that is wasted by the linear regulator?
input=0.612W.
output=0.300W.
So 0.312/0.612=~51%.

24. Design Expect a design question
We’ll give you the datasheet (or needed parts of a datasheet) for some part.
You’ll be asked to do some design.
Code will probably be Arduino (easiest to work with)
We’ll also give you any Arduino APIs needed.