1. When Vd4 = Vg4 > Vdd-|Vtp|, want Ms on,  VB < Vdd - 2|Vtp|
Start-up
When Vd4 = Vg4 > Vdd-|Vtp|, want Ms on,
 VB < Vdd - 2|Vtp|
When Vd4 = Vg4 < Vdd -|Vtp|-Veff, want Ms off
 VB < Vdd - 2|Vtp| - Veff
make VB ~ Vdd-2|Vtp| to Vdd-2|Vtp|-Veff
Also make IQ in right branch to be very small.
VDD
VDD
VDD M3 M4 VB Ms M1 M2

2. When Vd4 = Vg4 > Vdd-|Vtp|, PMOS are off, VB ~ 0  want Ms on,
Start-up
When Vd4 = Vg4 > Vdd-|Vtp|, PMOS are off, VB ~ 0
 want Ms on,
When Vd4 = Vg4 < Vdd -|Vtp|-Veff, PMOS are on,
want VB goes high,
 Ms off
make M6’s saturation current << M5’s saturation current.
VDD
VDD
VDD M3 M4 VB Ms
VDD M1 M2

3. When Vd4 = Vg4 > Vdd-|Vtp|, PMOS are off, VB ~ 0  want Ms on,
Start-up
When Vd4 = Vg4 > Vdd-|Vtp|, PMOS are off, VB ~ 0
 want Ms on,
When Vd4 = Vg4 < Vdd -|Vtp|-Veff, PMOS are on,
want VB goes high,
 Ms off
make M6’s saturation current << M5’s saturation current.
VDD
VDD
VDD M3 M4
VDD VB Ms
VDD M1 M2

4. Start-up
VDD
VDD
VDD M3 M4 VB M1 M2

5. Temperature independent reference
Generate a negatively PTAT (Proportional To Absolute Temperature) and a positively PTAT quantities and sum them appropriately.
X can be voltage or current

6. Bandgap voltage reference
Chapter 7 Figure 09
Works in bipolar or BiCMOS

7. A Common way of bandgap reference
This is easily available in digital CMOS
DVBE  kT/q

8. VBE has negative temp coeff at roughly -2
VBE has negative temp coeff at roughly -2.2 mV/°C at room temperature, called CTAT or NTAT
Vt = kT/q is PTAT that has a temperature coefficient of mV/°C at room temperature.
Multiply Vt by a constant K and sum it with the VBE to get
VREF = VBE + KVt
If K is right (2.2/0.08526), temperature coefficient can be zero.

9. In general, use VBE + VPTAT

10. Bandgap reference still varies a little with temp

11. How to get Bipolar in CMOS?

12. Layout
P-active is E
N-well is B
P-substrate is C
Tie both n-well and p-substrate to Vss
Issues: this will not pass LVS
Cadence does not know how to simulate

13. DVbe = ln(n)kT/q 1:1 1:1 Vref = xDVbe + Vbe = xln(n)kT/q + Vbe + +
VDD
VDD
VDD
1:1
1:1
Dvbe/R
- +
Dvbe/R
Vref
= xDVbe + Vbe
= xln(n)kT/q + Vbe
= xln(n)
Vbe1 + - + - R
DVbe xR
xDVbe
Vbe2 Q nQ nQ
IseVbe1/vth
nIseVbe2/vth =

14. VDD
VDD
VDD
1:1
1:1
- +
Vref R xR Q 8Q 8Q

15. Design Steps Convenient ratio: n=8
Select desired current I (e.g. 10 uA)
Select R by making I = ln(n)kT/q/R  R = ln(8)*26mV/10uA
Select xR to make Vref = 1.26 V  x = 0.65V/26mV/ln(8)
Trim xR to make Vref correct

16. Adding more degrees of freedom
VDD
VDD
VDD
m:1
1:r
- +
Vref R xR Q nQ nQ

17. R1 and R3 equal and equal to xR2
Q2 = nQ1
Design steps are identical to before.
Chapter 7 Figure 13

18. These are popular structures, but not doable in CMOS
Chapter 7 Figure 11
These are popular structures, but not doable in CMOS
Chapter 7 Figure 10

19. Cascoded CM
Cascoded CG
amplifier

20. Chapter 7 Figure 15

21. Banba, Hironori, Hitoshi Shiga, Akira Umezawa, Takeshi Miyaba, Toru Tanzawa, Shigeru Atsumi, and Koji Sakui. "A CMOS bandgap reference circuit with sub-1-V operation." Solid-State Circuits, IEEE Journal of 34, no. 5 (1999):