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Introduction to Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) Chapter 7, Anderson and Anderson
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MOSFET History (Very Short!)
First Patents: 1935 Variable Capacitor Proposed: 1959 Silicon MOS: 1960 Clean PMOS, NMOS: Late 1960s, big growth! CCDs: 1970s, Bell Labs Switch to CMOS: 1980s
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Structure: n-channel MOSFET (NMOS)
p n+ metal L W source S gate: metal or heavily doped poly-Si G drain D body B oxide (bulk or substrate) IG=0 ID=IS y IS x
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MOSFET Future (One Part of)
International Technology Roadmap for Semiconductors, 2006 update. Look at size, manufacturing technique.
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MOSFET Scaling ECE G201
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Gate prevents “top” gate Fin (30nm) BOX
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Circuit Symbol (NMOS) enhancement-type: no channel at zero gate voltage
D S B (IB=0, should be reverse biased) ID= IS IG= 0 G-Gate D-Drain S-Source B-Substrate or Body IS
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Energy bands (“flat band” condition; not equilibrium) (equilibrium)
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Flatbands! For this choice of materials, VGS<0 n+pn+ structure ID ~ 0
W source S gate G drain D body B oxide + - VD=Vs
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Flatbands < VGS < VT (Includes VGS=0 here)
Flatbands < VGS < VT (Includes VGS=0 here). n+-depletion-n+ structure ID ~ 0 p n+ n++ L W source S gate G drain D body B oxide + - VD=Vs +++
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VGS > VT n+-n-n+ structure inversion
p n+ n++ L W source S gate G drain D body B oxide + - +++ VD=Vs
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to uncovered acceptor ions
Channel Charge (Qch) VGS>VT Depletion region charge (QB) is due to uncovered acceptor ions Qch
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p n+ n++ L W (x) Ec(y) with VDS=0
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Increasing VGS decreases EB
EF ~ EC y L
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Threshold Voltage Definition
VGS = VT when the carrier concentration in the channel is equal to the carrier concentration in the bulk silicon. Mathematically, this occurs when fs=2ff , where fs is called the surface potential
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Triode Region A voltage-controlled resistor @small VDS
p n+ metal S D B oxide + - +++ VGS1>Vt ID increasing VGS B S - + D +++ VGS2>VGS1 +++ +++ metal G oxide p n+ n+ VDS cut-off B S + D 0.1 v - +++ VGS3>VGS2 +++ +++ Increasing VGS puts more charge in the channel, allowing more drain current to flow +++ metal oxide p n+ n+
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Saturation Region occurs at large VDS
As the drain voltage increases, the difference in voltage between the drain and the gate becomes smaller. At some point, the difference is too small to maintain the channel near the drain pinch-off p n+ metal source S gate G drain D body B oxide + - +++ VD>>Vs
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Saturation Region occurs at large VDS
The saturation region is when the MOSFET experiences pinch-off. Pinch-off occurs when VG - VD is less than VT. p n+ metal source S gate G drain D body B oxide + - +++ VD>>Vs
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Saturation Region occurs at large VDS
VGS - VDS < VT VDS > VGS - VT p n+ metal source S gate G drain D body B oxide + - +++ VD>>Vs
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Saturation Region once pinch-off occurs, there is no further increase in drain current
ID triode VDS>VGS-VT increasing VGS VDS<VGS-VT VDS 0.1 v
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Band diagram of triode and saturation
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Simplified MOSFET I-V Equations
Cut-off: VGS< VT ID = IS = 0 Triode: VGS>VT and VDS < VGS-VT ID = kn’(W/L)[(VGS-VT)VDS - 1/2VDS2] Saturation: VGS>VT and VDS > VGS-VT ID = 1/2kn’(W/L)(VGS-VT)2 where kn’= (electron mobility)x(gate capacitance) = mn(eox/tox) …electron velocity = mnE and VT depends on the doping concentration and gate material used (…more details later)
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