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Motivation Combinational logic functions can be represented, and defined, by truth tables. Sequential logic function cannot, because their behavior depends upon both the state of their inputs and their current state. Implementing the control logic for a CPU will require using sequential logic functions, and we need a tool to express and model those functions mathematically. September 2009 © McQuain, Feng & Ribbens
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Finite State Machine A finite state machine (FSM) is…
- a finite set of states Q = {S0, S1, , SN}, and - a set of possible input values I = {i0, i1, , iK}, and - a set of possible output values O = {o0, o1, , oM}, and - a next state function F:QxIS, and - an output function G:QxIO The next state function maps the current inputs and the current state the next state of the FSM. The output function maps the current state and possibly the current inputs to a set of asserted outputs. September 2009 © McQuain, Feng & Ribbens
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Simple Example Here's a simple FSM representing a basic digital function. We have: Q = {E, O} I = {0, 1, end} O = {'E', 'O'} What's the next state function? What does it DO? E O start halt 1 end/E end/O Current State Input Next State Output E 1 O end halt 'E' 'O' September 2009 © McQuain, Feng & Ribbens
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Traffic Light Controller
Consider a traffic light (red/green only) at an intersection of a north-south street with an east-west street; there are two input signals: NScar: Indicates that a car is over the detector placed in the roadbed in front of the light on the north-south road (going north or south). EWcar: Indicates that a car is over the detector placed in the roadbed in front of the light on the east-west road (going east or west). The traffic light should change from one direction to the other only if a car is waiting to go in the other direction; otherwise the light should continue to show green in the same direction as the last car that crossed the intersection. September 2009 © McQuain, Feng & Ribbens
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Traffic Light Controller Output Signals
There are two output signals: NSlite: When this signal is asserted (1), the light on the north-south road is green; when this signal is deasserted (0), the light on the north-south road is red. EWlite: When this signal is asserted (1), the light on the east-west road is green; when this signal is deasserted (0), the light on the east-west road is red. Arguably, it is acceptable if both output signals are deasserted at the same time, but clearly they must never both be asserted at the same time. September 2009 © McQuain, Feng & Ribbens
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Traffic Light Controller States
We need two states: NSgreen: the traffic light is green in the north-south direction EWgreen: the traffic light is green in the east-west direction September 2009 © McQuain, Feng & Ribbens
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TL Controller Schematic
September 2009 © McQuain, Feng & Ribbens
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TL Controller Next-State & Output Fns
Inputs Current State NScar EWcar Next State NSgreen 1 EWgreen Outputs Current State NSlite EWlite NSgreen 1 EWgreen September 2009 © McQuain, Feng & Ribbens
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TL Controller Next-State Analysis
Inputs Current State NScar EWcar Next State NSgreen 0 NSgreen 1 EWgreen 1 EWgreen Let's represent the states NSGreen and EWGreen by 0 and 1, respectively. Then: September 2009 © McQuain, Feng & Ribbens
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TL Controller Output Analysis
Outputs Current State NSlite EWlite 0 NSgreen 1 1 EWgreen September 2009 © McQuain, Feng & Ribbens
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TL Controller Implementation
From slide #9 1-bit storage device September 2009 © McQuain, Feng & Ribbens
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Relationship to Hardware
Common design issues in hardware control can be efficiently represented and analyzed using FSMs. September 2009 © McQuain, Feng & Ribbens
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