1. Hot Chips, Slow Wires, Leaky Transistors
ISCA 2000 Panel:
Hot Chips, Slow Wires, Leaky Transistors
T. N. Vijaykumar
School of Electrical & Computer Engineering
Purdue University

2. Power Dissipation Dynamic and static components
dynamic: switching
static: subthreshold leakage, when NOT switching
Reduce dynamic component
proportional to Vdd => need lower Vdd
must lower threshold voltage (Vt) for high speed
But lower Vt means higher static power

3. Subthreshold Leakage
log(Ids)
Vth1
Vth2
Vgs

4. Subthreshold Leakage Trends
Static power component increasing
lower Vt => EXPONENTIALLY higher leakage
shorter channel => more leakage
more #transistors => more leakage
Large on-chip memory structures
dynamic power during accessing one cache block
static power through ALL cells, ALL the time

5. Current Power Reduction Techniques
Many circuit techniques
typically at circuit-block level
target dynamic and static power
e.g., clock gating, dual-Vt CMOS
Some architecture techniques
dynamic power-reduction schemes
e.g., pipeline gating, throttling misspeculations
no published techniques for static power

6. Reducing Power Dissipation
Current hardware built for worst-case demand
e.g., pipeline width, memory hierarchy
But usage varies across and within program
Provide power on a “need-only” basis
reconfigure hardware to fit application demand
Need to integrate circuit & architecture levels
circuit mechanisms to turn off unused circuits
architecture techniques to decide which/when
tackle both static and dynamic power issues

7. Slow Wires Global wires are problem, short wires are not
short wires RC scale as feature size decreases
long wires in wider/larger pipelines problematic
Need decentralized microarchitectures
not pay long wire-delays for near communication
pay extra cycles for far communication
But need to keep software in mind
“all multiprocessor” world has software problems
need support for speculatively parallel execution
Wisc Multiscalar, Stanford Hydra, CMU Stampede

8. A Shameless Plug! Low power project at Purdue
Integrated Circuit Architecture Approach to Low Power (ICALP)
Multiplex project at Purdue
Combines explicit and speculative parallelism