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Silicon Pixel Detector for the PHENIX experiment at the BNL RHIC
R. Ichimiya (RIKEN) for the PHENIX/VTX Collaboration R. Ichimiya PIXEL2008
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Outline Introduction Silicon pixel Detector Summary PHENIX experiment
Requirements from the physics Silicon pixel Detector Silicon pixel detector system Key components High signal density signal bus High throughput front-end ASIC Summary R. Ichimiya PIXEL2008
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The PHENIX experiment at RHIC
The RHIC Collider Located at BNL The first collider of heavy ion Top Energy: √sNN = 200 GeV for Au-Au 10 times the energy previously available! √total s = 40 TeV for Au+Au Luminosity Au-Au: 2 x 1026 cm-2 s-1 p-p : 2 x 1031 cm-2 s-1 (polarized) The PHENIX experiment Located at 8 O’clock on the RHIC Experiments for Heavy ion collision (QGP) Polarized proton collision (spin physics) R. Ichimiya PIXEL2008
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The PHENIX experiment The PHENIX detector consists of
Two central arms to measure electron, photon, and hadrons Three Global detectors for trigger and event characterization Two forward muon spectrometers They measure lepton, photon and hadron with High rate and good Particle ID capability Limited solid angle Building Vertex detector gives 4p solid angle near the collision point Precise vertex information especially for the heavy particles (bottom, charm). Vertex detector vertex R. Ichimiya PIXEL2008
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Pixel detector for vertex detector
Vertex measurement for heavy quarks (b, c) near the collision point: Adds Silicon detectors near the collision point. Forms cylindrical 4 layers at barrel region. Inner 2 layers are pixel detectors. <= This talk. We used the pixel detector which originally developed for Alice/LHBb experiment at LHC. Modification and Optimization for this detector is the topic of this talk. Outer 2 layers are strip (stripixel) detectors. Rachid will give a talk at this afternoon. Strip decay point Pixel Heavy quark Heavy ion Vertex point Heavy ion Silicon vertex tracker R. Ichimiya PIXEL2008
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Pixel detector for vertex detector
Vertex measurement for heavy quarks (b, c) near the collision point: Requirements for the Pixel detector Collision Rate ~ 10MHz -> Timing Resolution < 100nsec Trigger Rate Max. ~20kHz Occupancy < 1% for pixel detector Tracking Resolution 50micron for displacement Material Budget ~ 1% of radiation length -> To prevent multiple scattering of charged particles and pair-creation of e+e- with g-ray. This requires High trigger rate Thin R. Ichimiya PIXEL2008
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Pixel detector for vertex detector
Strip detector VTX Layer R1 R2 R3 R4 Geometrical dimensions R (cm) 2.5 5 10 14 Dz (cm) 21.8 31.8 38.2 Area (cm2) 280 560 1960 3400 Channel count Sensor size R z (cm2) 1.28 1.36 (256 × 32 pixels) 3.43 × 6.36 (384 × 2 strips) Channel size 50 425 mm2 80 mm 3 cm (effective 80 1000 mm2) Sensors/ladder 4 4 6 Ladders 20 18 26 Sensors 160 320 90 156 Readout chips 1080 1872 Readout channels 1,310,720 2,621,440 138,240 239,616 Radiation length (X/X0) Sensor 0.22% 0.67 % Readout 0.16% 0.64 % Bus 0.28% Ladder & cooling 0.78% 0.78 % Total 1.44% 2.1 % Total channel: 4Mch Radiation length (X/X0): 1.44% R. Ichimiya PIXEL2008
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Pixel detector for vertex detector
Specification of the Pixel detector p-in-n silicon pixel sensor Width 200mm (MIP:15000e-) 32 x 256 (x4) pixel Pixel size 50 x 425mm2 Sensitive area 12.8 x 13.6mm2 Depletion Voltage 〜8V 5cm wafer 50mm 425mm 1pixel of the pixel detector R. Ichimiya PIXEL2008
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Pixel detector system Pixel bus (half stave) Bus extender
Readout board Four Signal layers Wire bonding Power Layers Pixel sensor module Bending point Readout chip Support & Cooling PHENIX pixel bus bump 20 mm 100um gluing with Araldite R. Ichimiya PIXEL2008
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Pixel bus Pixel bus (half stave) Bus extender SPIRO
250 mm 13.9mm SPIRO 500 m 120 m Width 30mm, spacing 30mm Low material flexible PC board Ultra high-density like IC substrate & large scale (250mm). R. Ichimiya PIXEL2008
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High throughput front-end ASIC
ALICE readout board (MCM) (near detector) ALICE readout 1 2 3 4 5 6 7 8 9 10 32 bit 256 bit Serial Readout time: 256 x 10 x 106ns = 271ms Trigger rate 3.6kHz PHENIX readout (far detector) PHENIX readout Data 128 bit 2 1 32 bit Parallel 32 bit Readout time: 256 x 2 x 106ns = 54.3ms Trigger rate 18.2kHz R. Ichimiya PIXEL2008
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High throughput front-end ASIC
PHENIX readout Data 128 bit Parallel 2 1 32 bit 2 1 32 bit 2 1 32 bit 2 1 32 bit To achieve fast trigger rate (~20kHz), Readout board locates far detector to get space margin. Introduce 4 parallel readout for the detector. Developed double input width (64bit) front-end ASIC (Digital Pilot ASIC). Expanded input and output data width. ~300 chips fabricated with same radiation tolerant process of IBM. R. Ichimiya PIXEL2008
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Summary The PHENIX detector is being upgraded with Silicon detectors to get vertex information of heavy quarks by 2010. Silicon Pixel detector is for inner 2 layers, it has Low material budget (X/X0 =1.44%), Fast trigger rate (~20kHz). To achieve these requirement, we developed Thin and high-density readout bus, High throughput front-end ASIC (Digital Pilot ASIC). Almost items has been developed and moving to production phase. R. Ichimiya PIXEL2008
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