1. General DSM layout for E+B
Layer 1
Layer 0
Endcap
Sum energy A-F
Layer 3
Endcap
9 DMSs
Layer 2
LAST
DSM
West Barrel
Sum energy A-D
E+B
DSM
West Barrel
Sum energy E-F
East Barrel
Sum energy A-D
West Barrel
15 DMSs
Naming scheme for 1x1 patches in E+B F0 A0 B0 C0 D0 E0 A1 B1 C1 D1 E1 F1 A2 F2 E2 D2 C2 B2
Endcap
West Barrel
East Barrel
East Barrel
Sum energy E-F
Endcap
thresholds
West Barrel
thresholds
East Barrel
15 DMSs
East Barrel
thresholds

2. High Tower bits B+E Layer 0 Endcap 0.6 0.3 A0 B0 C0 D0 E0 F0 LAST DSM
Endcap 1x6
Input 12*6=72
6 bits
E+B EMC
Input:
3*6=18 (~HT)
68 tot energy
(not shown)
36 1x1 patch
Over threshold
6 free
…..
6 bits
6 bits
West Barrel A1
0.2
0.4 B1 C1 D1 E1 F1
Layer 0
6 bits
6 bits
West Barrel 1x6
Input 18*6=108
…..
6 bits
East Barrel A2
6 bits
East Barrel 1x6
Input 18*6=108
….. F2
6 bits
2 bits – max HT energy
2 bits –TP energy which contains above HT
2 bits – HT multiplicity

3. Energy sum bits B+E Layer 0 Endcap 0.6 0.3 A0 B0 C0 D0 E0 F0 Layer 2
Total energy
(all bits carried)
Layer 1
10 bits
Endcap 1x6
Input 12*10=120
Output 14+12 14
A0 +…+ F0
10 bits 14
A1 +…+ D1 13
E1 +…+ F1
West Barrel A1
0.2
0.4 B1 C1 D1 E1 F1
Layer 0
10 bits
West Barrel 1x4
Input 12*10=120
Output 14+8 14
A2 +…+ D2
LAST
DSM
10 bits 13
E2 +…+ F2
10 bits
West Barrel 1x2
Input 8*10=80
Output 13+4
1x1 patch energies
Each over 3 thresholds
10 bits 12
A0 ,…,F0 8
A1 ,…,D1
East Barrel
10 bits
East Barrel 1x4
Input 12*10=120
Output 14+8 4
E1 ,…,F1
A2 ,…,D2
10 bits 8
A2 ,…,D2 4
E2 ,…,F2
10 bits
East Barrel 1x2
Input 8*10=80
Output 13+4
E2 ,…,F2
total energy E+B over Th
test for 1x2 or 2x2 patches in E+B over Th
Use lookup table to turn On/OFF E or B
10 bits