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Published byPatrick Rose Modified over 6 years ago
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An MTCMOS Design Methodology and Its Application to Mobile Computing
Samsung, Tohoku University in Japan ISLPED’03
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MTCMOS / VTCMOS/ dual Vt
Introduction Mobile device requires high performance and low standby power High performance MTCMOS / VTCMOS/ dual Vt High performance Low Vt Low performance Low Vt
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to maintain performance
Preliminaries MTCMOS Process VDD Vt leakage exp to maintain performance virtual ground bounce channel width of CCS
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Preliminaries Problem: stored data in sleep mode
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Design issues(1) Current of CCS Mutual exclusive pattern
Consider timing Cluster based partially exclusive pattern T=RC α VC/I , I α W Average Current Method (ACM) Different designs same average ground bounce
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Design issues(2) Complementary pass-transistor flip flop 1.Clock low
2.Clock high Edge trigger 3.Sleep mode
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Floating input problem
IP in SOC always awake in sleep mode
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Floating prevention circuit (FPC)
Insert tri-state buffer & holder
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MTCMOS power management
PMB is embedded for mobile computing Date-preserving RC of VGND
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RTL include PMB (SC & SCB)
Design flow RTL include PMB (SC & SCB) CPFFs & FPCs insert Power estimation & use ACM
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Result Chip features Leakage is 6000 times smaller than non-MTCMOS
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Conclusion Cut-off switches sizing and insertion
CPFF preserve the data FPC prevent short-circuit current PMB integrated Three orders of reduction of leakage
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